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DVI in FPGA

Started by Mawafugo March 21, 2009
In xapp460 the DVI/HDMI transmitter & receiver is implemented but the
max throughput limit to somewhat 750 Mb/s, which can handle up to
1080i or 720p resolution.  The 1080p, however needs twice of that

The question is how can we crank up the throughput to about 1.5 Gb/s ?
On Mar 21, 3:47=A0pm, Mawafugo <cco...@netscape.net> wrote:
> In xapp460 the DVI/HDMI transmitter & receiver is implemented but the > max throughput limit to somewhat 750 Mb/s, which can handle up to > 1080i or 720p resolution. =A0The 1080p, however needs twice of that > > The question is how can we crank up the throughput to about 1.5 Gb/s ?
answer is: it is not doable with S3A Antti
On Mar 21, 10:52=A0am, "Antti.Luk...@googlemail.com"
<Antti.Luk...@googlemail.com> wrote:
> On Mar 21, 3:47=A0pm, Mawafugo <cco...@netscape.net> wrote: > > > In xapp460 the DVI/HDMI transmitter & receiver is implemented but the > > max throughput limit to somewhat 750 Mb/s, which can handle up to > > 1080i or 720p resolution. =A0The 1080p, however needs twice of that > > > The question is how can we crank up the throughput to about 1.5 Gb/s ? > > answer is: it is not doable with S3A > > Antti
Oh thanks, Sounds like there's noway around the MGT then, but it is costly $$$
On Mar 22, 3:49=A0pm, halong <cco...@netscape.net> wrote:
> On Mar 21, 10:52=A0am, "Antti.Luk...@googlemail.com" > > <Antti.Luk...@googlemail.com> wrote: > > On Mar 21, 3:47=A0pm, Mawafugo <cco...@netscape.net> wrote: > > > > In xapp460 the DVI/HDMI transmitter & receiver is implemented but the > > > max throughput limit to somewhat 750 Mb/s, which can handle up to > > > 1080i or 720p resolution. =A0The 1080p, however needs twice of that > > > > The question is how can we crank up the throughput to about 1.5 Gb/s =
?
> > > answer is: it is not doable with S3A > > > Antti > > Oh thanks, > > Sounds like there's noway around the MGT then, but it is costly $$$
well MGT can not do TMDS/DVI, only S3A can! so you need to wait S6/V6 and hope they can do it Antti
I think that there is no particularly advantage of implementing DVI
receiver and transmitter functions in FPGA. There are sophisticated
solutions on the market for that, DVI/HDMI receiver and transmitter
ICs are available for this task. These implementations are surely
compatible with the standard, so you don't have to care about e.g. the
eye-diagrams. Lot of circuits has features what cannot be implemented
in FPGA: e.g. high and adaptive input equalization on TMDS, adjustable
driver parameters, etc.
If you use a separate DVI receiver, then you got the paralell pixel
data and you can process it with an FPGA if you want. But if you
implement the receiver function in FPGA then - due to the complicated
standard - you will certainly not too much space to additional tasks
and functions..

On Mar 21, 2:47=A0pm, Mawafugo <cco...@netscape.net> wrote:
> In xapp460 the DVI/HDMI transmitter & receiver is implemented but the > max throughput limit to somewhat 750 Mb/s, which can handle up to > 1080i or 720p resolution. =A0The 1080p, however needs twice of that > > The question is how can we crank up the throughput to about 1.5 Gb/s ?