Open Source synthesizable Arm vhdl model: For those that are interested: We have allocated a Opencores Project at: http://www.opencores.org/projects.cgi/web/core_arm/overview The source can be checked out via CVS or snapshots. Meanwhile on sourceforge you can browse them too. Vhdl files are annotated and nice to read. http://skdec.sourceforge.net/build_html/vhdl/index.htm Slowly but shurely we aproach a working verion. Indeed very slowly.
Free Arm Version 0.8
Started by ●April 10, 2004
Reply by ●April 11, 20042004-04-11
hi! i saw the "annotated" version and i loved it!, specially the "crosslinks" or "hyperlinks" explaining what's the use or the definition of signals, etc. How did you produce it?, is there a program or IDE for VHDL that helps you write code that way? cause it's great! "Konrad Eisele" <eiselekd@web.de> escribi� en el mensaje news:ddbcd13.0404101053.490c82c6@posting.google.com...> Open Source synthesizable Arm vhdl model: > > For those that are interested: > We have allocated a Opencores Project at: > http://www.opencores.org/projects.cgi/web/core_arm/overview > The source can be checked out via CVS or snapshots. > Meanwhile on sourceforge you can browse them too. Vhdl > files are annotated and nice to read. > http://skdec.sourceforge.net/build_html/vhdl/index.htm > Slowly but shurely we aproach a working verion. Indeed > very slowly.