5.0V and 3.3V PCI interfacing with Altera Cyclone III

I am working on building a PC/104+ board with support for a 32 bit
master target PCI interface. I want to be able to support the 32-bit
33MHz PCI bus at both 3.3V and 5.0V. I want to use the Altera PCI
master/target IP core to support the PCI interface and connect it to
my SOPC builder system through the Avalon memory mapped interface.

I have read through Altera App Note 330, which talks about connecting
3.3V PCI devices to a 5.0V PCI Bus.
( http://www.altera.com/literature/an/an330.pdf )

I was wondering, if I use bus switches as suggested in AN330, do I
need to run the banks on my Cyclone III configured for PCI style IO at
3.0V, with VCCIO at 3.0V, or should I configure these banks for 3.3V
LVTTL style IO with VCCIO at 3.3V?

Apparently the Cyclone III is a bit finicky with 3.3V IO and you have
to be careful about overshoot. Normally if you want to connect the
Cyclone III to a 3.3V PCI bus, you have to configure the connected IO
pins to run at 3.0V PCI and run associated VCCIO rails at 3.0V.
( http://www.altera.com/support/kdb/solutions/rd01142008_525.html )

To switch between 3.3V PCI and 5.0V PCI, I think I can put a switch on
the board to select either 5.0V or 3.3V to be connected as the
reference input rail for my bus switches. Do you think this is a sound
strategy?

Another question for anyone who has experience with the Altera PCI IP
core is this: Can the PCI 32-bit Master/Target IP core act as the host
for other devices that I might wish to slave to it, for instance if I
want to stack several PC/104+ boards on the board that I am building,
can the Cyclone III act as master and control all the other boards on
my PCI bus? I think I need to include a bunch of pullup resistors on
many of my PCI control signal pins if I want to do this. Any comments
here?

Has anyone tried using the Opencores.org PCI master/target core? Have
you had any success with it?

thanks for the help...

Not Altera, at least not yet, but you can see the bus switch technique
on a range of our boards - Hollybush1, Hollybush2, Raggedstone1 and so
on. Generally running the I/O at 3.3V is good enough for 3V3 and 5V
signalling.. Bias the bus switches are the right point and you don't
need to switch anything.

On Opencores we have a number of customers apparently doing ok with
it.

John Adair
Enterpoint Ltd.


On 16 June, 18:38, wallge <wal...@gmail.com> wrote:
> I am working on building a PC/104+ board with support for a 32 bit
> master target PCI interface. I want to be able to support the 32-bit
> 33MHz PCI bus at both 3.3V and 5.0V. I want to use the Altera PCI
> master/target IP core to support the PCI interface and connect it to
> my SOPC builder system through the Avalon memory mapped interface.
>
> I have read through Altera App Note 330, which talks about connecting
> 3.3V PCI devices to a 5.0V PCI Bus.
> (http://www.altera.com/literature/an/an330.pdf)
>
> I was wondering, if I use bus switches as suggested in AN330, do I
> need to run the banks on my Cyclone III configured for PCI style IO at
> 3.0V, with VCCIO at 3.0V, or should I configure these banks for 3.3V
> LVTTL style IO with VCCIO at 3.3V?
>
> Apparently the Cyclone III is a bit finicky with 3.3V IO and you have
> to be careful about overshoot. Normally if you want to connect the
> Cyclone III to a 3.3V PCI bus, you have to configure the connected IO
> pins to run at 3.0V PCI and run associated VCCIO rails at 3.0V.
> (http://www.altera.com/support/kdb/solutions/rd01142008_525.html)
>
> To switch between 3.3V PCI and 5.0V PCI, I think I can put a switch on
> the board to select either 5.0V or 3.3V to be connected as the
> reference input rail for my bus switches. Do you think this is a sound
> strategy?
>
> Another question for anyone who has experience with the Altera PCI IP
> core is this: Can the PCI 32-bit Master/Target IP core act as the host
> for other devices that I might wish to slave to it, for instance if I
> want to stack several PC/104+ boards on the board that I am building,
> can the Cyclone III act as master and control all the other boards on
> my PCI bus? I think I need to include a bunch of pullup resistors on
> many of my PCI control signal pins if I want to do this. Any comments
> here?
>
> Has anyone tried using the Opencores.org PCI master/target core? Have
> you had any success with it?
>
> thanks for the help...

With the CycloneIIIs you have to be careful that any 3.3V interfaces
don't overshoot but using the bus switch (I've used IDT quickswitches)
should reduce the overshoot risk.

As John says 3.3V output should be OK with 5V PCI because the 5V signalling
Vih is 2.0V


Nial

PCI is an open termination bus which is capable of huge overshoots. The PCI 
spec requires 3.3V parts to have clamp diodes. Many of the manufacturers 
fail to comply with this requirement. I don't know about Altera. Take a look 
at the following Xilinx appnote about PCI compliancy. You might find it 
useful...
http://www.xilinx.com/support/documentation/application_notes/xapp311.pdf

/Mikhail



"wallge" <wallge@gmail.com> wrote in message 
news:9817eec3-e820-4ce7-ab9d-a01fcefa4cf4@h2g2000yqg.googlegroups.com...
>I am working on building a PC/104+ board with support for a 32 bit
> master target PCI interface. I want to be able to support the 32-bit
> 33MHz PCI bus at both 3.3V and 5.0V. I want to use the Altera PCI
> master/target IP core to support the PCI interface and connect it to
> my SOPC builder system through the Avalon memory mapped interface.
>
> I have read through Altera App Note 330, which talks about connecting
> 3.3V PCI devices to a 5.0V PCI Bus.
> ( http://www.altera.com/literature/an/an330.pdf )
>
> I was wondering, if I use bus switches as suggested in AN330, do I
> need to run the banks on my Cyclone III configured for PCI style IO at
> 3.0V, with VCCIO at 3.0V, or should I configure these banks for 3.3V
> LVTTL style IO with VCCIO at 3.3V?
>
> Apparently the Cyclone III is a bit finicky with 3.3V IO and you have
> to be careful about overshoot. Normally if you want to connect the
> Cyclone III to a 3.3V PCI bus, you have to configure the connected IO
> pins to run at 3.0V PCI and run associated VCCIO rails at 3.0V.
> ( http://www.altera.com/support/kdb/solutions/rd01142008_525.html )
>
> To switch between 3.3V PCI and 5.0V PCI, I think I can put a switch on
> the board to select either 5.0V or 3.3V to be connected as the
> reference input rail for my bus switches. Do you think this is a sound
> strategy?
>
> Another question for anyone who has experience with the Altera PCI IP
> core is this: Can the PCI 32-bit Master/Target IP core act as the host
> for other devices that I might wish to slave to it, for instance if I
> want to stack several PC/104+ boards on the board that I am building,
> can the Cyclone III act as master and control all the other boards on
> my PCI bus? I think I need to include a bunch of pullup resistors on
> many of my PCI control signal pins if I want to do this. Any comments
> here?
>
> Has anyone tried using the Opencores.org PCI master/target core? Have
> you had any success with it?
>
> thanks for the help... 

On Jun 17, 10:16=A0am, "MM" <mb...@yahoo.com> wrote:
> PCI is an open termination bus which is capable of huge overshoots. The P=
CI
> spec requires 3.3V parts to have clamp diodes. Many of the manufacturers
> fail to comply with this requirement. I don't know about Altera. Take a l=
ook
> at the following Xilinx appnote about PCI compliancy. You might find it
> useful...http://www.xilinx.com/support/documentation/application_notes/xa=
pp311...
>
> /Mikhail
>
> "wallge" <wal...@gmail.com> wrote in message
>
> news:9817eec3-e820-4ce7-ab9d-a01fcefa4cf4@h2g2000yqg.googlegroups.com...
>
> >I am working on building a PC/104+ board with support for a 32 bit
> > master target PCI interface. I want to be able to support the 32-bit
> > 33MHz PCI bus at both 3.3V and 5.0V. I want to use the Altera PCI
> > master/target IP core to support the PCI interface and connect it to
> > my SOPC builder system through the Avalon memory mapped interface.
>
> > I have read through Altera App Note 330, which talks about connecting
> > 3.3V PCI devices to a 5.0V PCI Bus.
> > (http://www.altera.com/literature/an/an330.pdf)
>
> > I was wondering, if I use bus switches as suggested in AN330, do I
> > need to run the banks on my Cyclone III configured for PCI style IO at
> > 3.0V, with VCCIO at 3.0V, or should I configure these banks for 3.3V
> > LVTTL style IO with VCCIO at 3.3V?
>
> > Apparently the Cyclone III is a bit finicky with 3.3V IO and you have
> > to be careful about overshoot. Normally if you want to connect the
> > Cyclone III to a 3.3V PCI bus, you have to configure the connected IO
> > pins to run at 3.0V PCI and run associated VCCIO rails at 3.0V.
> > (http://www.altera.com/support/kdb/solutions/rd01142008_525.html)
>
> > To switch between 3.3V PCI and 5.0V PCI, I think I can put a switch on
> > the board to select either 5.0V or 3.3V to be connected as the
> > reference input rail for my bus switches. Do you think this is a sound
> > strategy?
>
> > Another question for anyone who has experience with the Altera PCI IP
> > core is this: Can the PCI 32-bit Master/Target IP core act as the host
> > for other devices that I might wish to slave to it, for instance if I
> > want to stack several PC/104+ boards on the board that I am building,
> > can the Cyclone III act as master and control all the other boards on
> > my PCI bus? I think I need to include a bunch of pullup resistors on
> > many of my PCI control signal pins if I want to do this. Any comments
> > here?
>
> > Has anyone tried using the Opencores.org PCI master/target core? Have
> > you had any success with it?
>
> > thanks for the help...

In theory, Cyclone III's have PCI clamp diodes on general purpose I/O
pins (specifically NOT on dedicated clock inputs or repurposed
programming pins). However, I'm not sure I would trust them on a live
bus, so I'd still put the clamping diodes in. The diodes do add a bit
to the board size, but are probably worth it for the protection they
offer. If you are putting in bus switches, you might go ahead and
specify a local side of 2.5V - Altera has pretty much stated that they
don't recommend using 3.3V I/O for the Cyclone III.

On Jun 17, 1:30=A0pm, radarman <jsham...@gmail.com> wrote:
> On Jun 17, 10:16=A0am, "MM" <mb...@yahoo.com> wrote:
>
>
>
> > PCI is an open termination bus which is capable of huge overshoots. The=
 PCI
> > spec requires 3.3V parts to have clamp diodes. Many of the manufacturer=
s
> > fail to comply with this requirement. I don't know about Altera. Take a=
 look
> > at the following Xilinx appnote about PCI compliancy. You might find it
> > useful...http://www.xilinx.com/support/documentation/application_notes/=
xapp311...
>
> > /Mikhail
>
> > "wallge" <wal...@gmail.com> wrote in message
>
> >news:9817eec3-e820-4ce7-ab9d-a01fcefa4cf4@h2g2000yqg.googlegroups.com...
>
> > >I am working on building a PC/104+ board with support for a 32 bit
> > > master target PCI interface. I want to be able to support the 32-bit
> > > 33MHz PCI bus at both 3.3V and 5.0V. I want to use the Altera PCI
> > > master/target IP core to support the PCI interface and connect it to
> > > my SOPC builder system through the Avalon memory mapped interface.
>
> > > I have read through Altera App Note 330, which talks about connecting
> > > 3.3V PCI devices to a 5.0V PCI Bus.
> > > (http://www.altera.com/literature/an/an330.pdf)
>
> > > I was wondering, if I use bus switches as suggested in AN330, do I
> > > need to run the banks on my Cyclone III configured for PCI style IO a=
t
> > > 3.0V, with VCCIO at 3.0V, or should I configure these banks for 3.3V
> > > LVTTL style IO with VCCIO at 3.3V?
>
> > > Apparently the Cyclone III is a bit finicky with 3.3V IO and you have
> > > to be careful about overshoot. Normally if you want to connect the
> > > Cyclone III to a 3.3V PCI bus, you have to configure the connected IO
> > > pins to run at 3.0V PCI and run associated VCCIO rails at 3.0V.
> > > (http://www.altera.com/support/kdb/solutions/rd01142008_525.html)
>
> > > To switch between 3.3V PCI and 5.0V PCI, I think I can put a switch o=
n
> > > the board to select either 5.0V or 3.3V to be connected as the
> > > reference input rail for my bus switches. Do you think this is a soun=
d
> > > strategy?
>
> > > Another question for anyone who has experience with the Altera PCI IP
> > > core is this: Can the PCI 32-bit Master/Target IP core act as the hos=
t
> > > for other devices that I might wish to slave to it, for instance if I
> > > want to stack several PC/104+ boards on the board that I am building,
> > > can the Cyclone III act as master and control all the other boards on
> > > my PCI bus? I think I need to include a bunch of pullup resistors on
> > > many of my PCI control signal pins if I want to do this. Any comments
> > > here?
>
> > > Has anyone tried using the Opencores.org PCI master/target core? Have
> > > you had any success with it?
>
> > > thanks for the help...
>
> In theory, Cyclone III's have PCI clamp diodes on general purpose I/O
> pins (specifically NOT on dedicated clock inputs or repurposed
> programming pins). However, I'm not sure I would trust them on a live
> bus, so I'd still put the clamping diodes in. The diodes do add a bit
> to the board size, but are probably worth it for the protection they
> offer. If you are putting in bus switches, you might go ahead and
> specify a local side of 2.5V - Altera has pretty much stated that they
> don't recommend using 3.3V I/O for the Cyclone III.

Altera Support told me that if I was going to use the bus switches I
would still need to configure the connected cyclone III banks for 3.0V
PCI which means using the onboard clamp diodes. I would also have to
set the associated VCCIOs at 3.0V.

One thing I was wondering about with the bus switches: I want to be
able to interface with standard 3.3V PCI as well as 5.0V PCI. I
believe I cannot do both at the same time, so it is either one or the
other. Can I just put a switch on my board that will connect either
3.3V ref or 5V ref to the bus switches to determine which mode I am
in? I don't want to be in 5V mode all the time, because if I want to
master a 3.3V peripheral PCI device, 5V PCI signaling might burn up
the peripheral. Anyone have any thoughts here?

> One thing I was wondering about with the bus switches: I want to be
> able to interface with standard 3.3V PCI as well as 5.0V PCI. I
> believe I cannot do both at the same time, so it is either one or the
> other. Can I just put a switch on my board that will connect either
> 3.3V ref or 5V ref to the bus switches to determine which mode I am
> in? I don't want to be in 5V mode all the time, because if I want to
> master a 3.3V peripheral PCI device, 5V PCI signaling might burn up
> the peripheral. Anyone have any thoughts here?


Have a look at the IDT Quickswitches I mentioned previously.

These aren't voltage translators as such as FETs that are biased so that
if either of the inputs rise above a cetain threshold the FET resistance
increases.

If you consider the PCI bus side as the input then the FPGA side is effectively
'clamped' to whatever threshold you set (via reference pins).

This can then be used with both the 5V and 3.3V PCI buses.


Nial