Xilinx 3E design programs fine with 500E but fails with 250E

On Aug 21, 4:06=A0am, Steve <srk...@gmail.com> wrote:
> Hi Antii,
>
> Wow, I missed that bit - ive been so used to info not being what I
> wanted to read, that I totally over looked the fact you had written
> your own!
> Dangling that carrot in front of me is too much, so
>
> Would it be ok if I could have a copy??
>
> Thanks,
> Steve
>
>
>
> > > Hi Antii,
>
> > > Yep, i used too program direct as welll. But with the ease of using a
> > > bridge to a standard interfcae such as SPI or BPI, i dont think I eve=
r
> > > want to go back to that method. Its just so easy to provide a new
> > > level of support to your customers without have pages of inxtructions
> > > or esoteric programming equipment. Xilinx wont fix the bug. If the bu=
g
> > > wasnt that bad, they would have already. The 250E is toast.
>
> > > > Hi Steve,
>
> > > > i almost always used own JTAG-SPI bypass soft cores and own PC host
> > > > software for SPI flash programming
> > > > (before the feature was added to impact)
>
> > > > as I see the impact solution is still a problem. eh it would be so
> > > > much better if xilinx would supply source
> > > > code of the spi indirect cores... but they do not :(
>
> > > > Antti- Hide quoted text -
>
> > > > - Show quoted text -- Hide quoted text -
>
> > > - Show quoted text -
>
> > I did NOT program SPI-direct :)
>
> > I programed SPI indirect using my own JTAG IP cores and pc side
> > software
>
> > Antti- Hide quoted text -
>
> > - Show quoted text -- Hide quoted text -
>
> - Show quoted text -

i posted to the brain :)

Antti