Wants an update on FPGA development IDE/toolchains

Could anybody please show me a list of popular FPGA development 
IDE/toolchains and their approximate costs? For GCC compilers we can put 
the costs as 0.

It will be even better if you can give me your opinion about the 
followings performance with 1-10 mark (10 the best, 1 the worst).
    code density,
    Speed of execution
    targets  and hosts supported
    Other tools that work with it.
    Support from vendor (et al)


Thank you!

On Tue, 01 Sep 2009 09:30:58 -0600
Johnson <gpsabove@yahoo.com> wrote:

> Could anybody please show me a list of popular FPGA development 
> IDE/toolchains and their approximate costs? For GCC compilers we can
> put the costs as 0.
> 
> It will be even better if you can give me your opinion about the 
> followings performance with 1-10 mark (10 the best, 1 the worst).
>     code density,
>     Speed of execution
>     targets  and hosts supported
>     Other tools that work with it.
>     Support from vendor (et al)
> 
> 
> Thank you!

Are you just posting one of these in every newsgroup there is?  If I
went and checked comp.lang.cobol would you have posted the same
question, while putting the cost of the GCC COBOL compiler at 0?  And
I'd hate to see what you're asking in some of the alt.* groups.

-- 
Rob Gaddi, Highland Technology
Email address is currently out of order

On Sep 1, 6:30=A0pm, Johnson <gpsab...@yahoo.com> wrote:
> Could anybody please show me a list of popular FPGA development
> IDE/toolchains and their approximate costs? For GCC compilers we can put
> the costs as 0.
>
> It will be even better if you can give me your opinion about the
> followings performance with 1-10 mark (10 the best, 1 the worst).
> =A0 =A0 code density,
> =A0 =A0 Speed of execution
> =A0 =A0 targets =A0and hosts supported
> =A0 =A0 Other tools that work with it.
> =A0 =A0 Support from vendor (et al)
>
> Thank you!

its all matter of taste
the baselevel tools cost 0.0
for the full packages need to pay
code density: n/a (not applicable) FPGA do not execute compiled code,
they implement a designed hardware function
targets: all current FPGA's
hosts: win/linux
other: many
support: depends

Antti

Rob Gaddi wrote:
> On Tue, 01 Sep 2009 09:30:58 -0600
> Johnson <gpsabove@yahoo.com> wrote:
> 
>> Could anybody please show me a list of popular FPGA development 
>> IDE/toolchains and their approximate costs? For GCC compilers we can
>> put the costs as 0.
>>
>> It will be even better if you can give me your opinion about the 
>> followings performance with 1-10 mark (10 the best, 1 the worst).
>>     code density,
>>     Speed of execution
>>     targets  and hosts supported
>>     Other tools that work with it.
>>     Support from vendor (et al)
>>
>>
>> Thank you!
> 
> Are you just posting one of these in every newsgroup there is?  If I
> went and checked comp.lang.cobol would you have posted the same
> question, while putting the cost of the GCC COBOL compiler at 0?  And
> I'd hate to see what you're asking in some of the alt.* groups.
> 

Hi Rob,

Take a deep breath before you yell out.

I posted a question at comp.arch.embedded, and the other at 
comp.arch.fpga. They are different questions, aren't they? At 
comp.arch.embedded, I asked about toolchains about ARM, while at 
comp.arch.fpga I asked about toolchains about FPGA. I personally thought 
the toolchains for ARM and FPGA are different. However, I just started 
to learn about ARM and FPGA stuff recently, so I could be wrong. If you 
have different opinion, and are willing to help and share, please post.

Thanks!

Johnson

On Sep 1, 8:50=A0pm, Johnson <gpsab...@yahoo.com> wrote:
> Rob Gaddi wrote:
> > On Tue, 01 Sep 2009 09:30:58 -0600
> > Johnson <gpsab...@yahoo.com> wrote:
>
> >> Could anybody please show me a list of popular FPGA development
> >> IDE/toolchains and their approximate costs? For GCC compilers we can
> >> put the costs as 0.
>
> >> It will be even better if you can give me your opinion about the
> >> followings performance with 1-10 mark (10 the best, 1 the worst).
> >> =A0 =A0 code density,
> >> =A0 =A0 Speed of execution
> >> =A0 =A0 targets =A0and hosts supported
> >> =A0 =A0 Other tools that work with it.
> >> =A0 =A0 Support from vendor (et al)
>
> >> Thank you!
>
> > Are you just posting one of these in every newsgroup there is? =A0If I
> > went and checked comp.lang.cobol would you have posted the same
> > question, while putting the cost of the GCC COBOL compiler at 0? =A0And
> > I'd hate to see what you're asking in some of the alt.* groups.
>
> Hi Rob,
>
> Take a deep breath before you yell out.
>
> I posted a question at comp.arch.embedded, and the other at
> comp.arch.fpga. They are different questions, aren't they? At
> comp.arch.embedded, I asked about toolchains about ARM, while at
> comp.arch.fpga I asked about toolchains about FPGA. I personally thought
> the toolchains for ARM and FPGA are different. However, I just started
> to learn about ARM and FPGA stuff recently, so I could be wrong. If you
> have different opinion, and are willing to help and share, please post.
>
> Thanks!
>
> Johnson

lesson 1:

FPGA's are NOT processors.
they do not have "toolchain" as you have it for processor

FPGA's are not programmed in they way you write programs for processor

you dont write a program for FPGA, you DESCRIBE what hardware you
need..

Antti

On Sep 1, 12:00=A0pm, "Antti.Luk...@googlemail.com"
<antti.luk...@googlemail.com> wrote:
> On Sep 1, 6:30=A0pm, Johnson <gpsab...@yahoo.com> wrote:
>
> > Could anybody please show me a list of popular FPGA development
> > IDE/toolchains and their approximate costs? For GCC compilers we can pu=
t
> > the costs as 0.
>
> > It will be even better if you can give me your opinion about the
> > followings performance with 1-10 mark (10 the best, 1 the worst).
> > =A0 =A0 code density,
> > =A0 =A0 Speed of execution
> > =A0 =A0 targets =A0and hosts supported
> > =A0 =A0 Other tools that work with it.
> > =A0 =A0 Support from vendor (et al)
>
> > Thank you!
>
> its all matter of taste
> the baselevel tools cost 0.0
> for the full packages need to pay
> code density: n/a (not applicable) FPGA do not execute compiled code,
> they implement a designed hardware function
> targets: all current FPGA's
> hosts: win/linux
> other: many
> support: depends
>
> Antti

You could convert "code density" to synthesis efficiency
and possibly design size limits.  Efficiency of synthesis
is only partly covered by the tool vendor and partly by the
chip manufacturer who makes the back-end for their highly
proprietary internal structure.  Regardless of whose
tools you work with, the lowest level is provided by
the chip maker.

Zero-cost tools from the chip makers usually have the same
features and efficiency as the paid tools from the chip
makers, but they usually have fewer third-party add-ons
and may not support all sizes of chips.  That being said
the chips they don't support generally cost as much as
a full set of tools from the chip makers, i.e. even the
paid versions are not really big bucks.  Third party
add-ons like ModelSim simulation are generally restricted
in performance and design size.  Modelsim uses these
partnerships to attract paying customers when they get
fed up waiting for a simulation to finish.

Paid tools from third parties generally have some advantage
in efficiency or ability to control your outcome, in
addition to multiple chip-vendor support.  They typically
run big bucks compared to chip-maker versions.  Many
people justify the too expense by saying it makes them
independent of the chip maker, but then proceed to use
it only with a single chip vendor they get comfortable
with.  In recent years, the internal tool chains of
the chip makers have narrowed the efficiency gap
considerably with these third-party tools.

Some tool makers to look at:

3rd party:
Synplicity
Aldec
Mentor

Chip vendors:
Altera
Xilinx
Lattice
Actel

Have fun,

Gabor

Antti.Lukats@googlemail.com wrote:

> lesson 1:
> 
> FPGA's are NOT processors.
> they do not have "toolchain" as you have it for processor

There are some advanced people in this newsgroup who writes their own
makefiles to use the FPGA toolchain programs, which are really a set of
tools, glued together with some Tcl/Tk hacks :-) But usually you just use
the proprietary IDEs of the vendors.

-- 
Frank Buss, fb@frank-buss.de
http://www.frank-buss.de, http://www.it4-systems.de

On Sep 1, 9:20=A0pm, Frank Buss <f...@frank-buss.de> wrote:
> Antti.Luk...@googlemail.com wrote:
> > lesson 1:
>
> > FPGA's are NOT processors.
> > they do not have "toolchain" as you have it for processor
>
> There are some advanced people in this newsgroup who writes their own
> makefiles to use the FPGA toolchain programs, which are really a set of
> tools, glued together with some Tcl/Tk hacks :-) But usually you just use
> the proprietary IDEs of the vendors.
>
> --
> Frank Buss, f...@frank-buss.dehttp://www.frank-buss.de,http://www.it4-sys=
tems.de

yes, i do:)

well the vendor flow, eh call it whatever you want,
set of commandline tools

it's not however like

GCC toolchain for ARM
GCC toolchain for AVR
XXX toolchain for FPGA

maybe i explained it wrong, the toolchain call so much for "GCC
toolchain"..
even if make is used to run FPGA vendor flow, it not the "C compiler
toolchain"

Antti

Johnson wrote:

> Could anybody please show me a list of popular FPGA development
> IDE/toolchains and their approximate costs? 

Your choice of silicon more-or-less dictates the development tools you'll
be using. Yes, there are 3rd party synthesis tools but for "entry level
development" you're most likely looking at standard silicon vendor packages.

As for choosing silicon, unless you have an application that can take
advantage of a specific feature, the decision is to some degree a
"religious" one. Sometimes the choice is even based on the development
tools rather than the actual silicon.

So your questions are, to a large degree, "not applicable". For
entry-level, mainstream development you choose your silicon and you're
stuck with the vendor tools as supplied.

Regards,

-- 
Mark McDougall, Engineer
Virtual Logic Pty Ltd, <http://www.vl.com.au>
21-25 King St, Rockdale, 2216
Ph: +612-9599-3255 Fax: +612-9599-3266

Mark McDougall wrote:
> Johnson wrote:
> 
>> Could anybody please show me a list of popular FPGA development
>> IDE/toolchains and their approximate costs? 
> 
> Your choice of silicon more-or-less dictates the development tools you'll
> be using. Yes, there are 3rd party synthesis tools but for "entry level
> development" you're most likely looking at standard silicon vendor packages.
> 
> As for choosing silicon, unless you have an application that can take
> advantage of a specific feature, the decision is to some degree a
> "religious" one. Sometimes the choice is even based on the development
> tools rather than the actual silicon.
> 
> So your questions are, to a large degree, "not applicable". For
> entry-level, mainstream development you choose your silicon and you're
> stuck with the vendor tools as supplied.
> 
> Regards,
> 
Good and thanks. So what is the most "religious" FPGA silicon for now? I 
guess Zarlink, right? And what is the most popular development tools of 
Zarlink products to entry-level developers?