Hi everyone, I am a master student and this is my first post in this group. My research group is looking for a multicore embedded platform for deploying an in-house developed computer vision algorithm. I've checked some available development boards and now still weigh the ideas in my mind. One solution that interests me is 'synthesizable' processor cores on a FPGA chip, where I can parallelize the data processing on different cores. As far as I know, this solution is based on 'synthesizable' soft-cores, e.g. MicroBlaze, Nios or ARM Cortex-M1 etc. But I've seen one design article (carried out at NXP, the Netherlands) that claims they have implemented two ARM926EJ-S processors on a Xilinx Virtex 4 FPGA chip. I am wondering what technologies enable this implementation. My current knowledge only reaches the level of HDL-based hardware design on FPGAs (and some higher abstraction levels concerning software), but I am not very familiar with the 'macrocells', 'hard core IP' and digital ASIC design. I see some Virtex 4 products come with embedded hard PowerPC blocks, but I have not seen ARM...So I would like to ask you experienced scientists these questions: 1. How to implement one or more such ARM926EJ-S cores on a FPGA chip (detailed information on the NXP design article is not available)? I need some key words in this field and better with some recommended design articles. 2. How to interpret the word 'synthesizable' with respect to soft- cores and macrocells, respectively? 3. If someone has experiences on multicore parallel processing development, I would be grateful if you can suggest some nice development platforms (real-time performance is our top concern). Probably I need to make a new post later describing the requirements=85 Thanks very much for your attention! Lucien
Implement ARM cores on a FPGA chip?
Started by ●September 30, 2009
Reply by ●September 30, 20092009-09-30
LucienZ wrote:> Hi everyone, I am a master student and this is my first post in this > group. My research group is looking for a multicore embedded platform > for deploying an in-house developed computer vision algorithm. I've > checked some available development boards and now still weigh the > ideas in my mind.I might verify that the algorithm is amenable to parallel processing by borrowing a rack of servers before I took on building the same thing on an fpga. -- Mike Treseler
Reply by ●October 1, 20092009-10-01
> But I've seen > one design article (carried out at NXP, the Netherlands) that claims > they have implemented two ARM926EJ-S processors on a Xilinx Virtex 4 > FPGA chip. I am wondering what technologies enable this > implementation.The same technologies that enable any other CPU to be put on an FPGA. The ARM926EJ-S is no different, except that it will be a lot bigger and a lot slower, than other FPGA specific CPUs.> 1. How to implement one or more such ARM926EJ-S cores on a FPGA chipTalk to ARM, but you probably can't afford it. Jon
Reply by ●October 1, 20092009-10-01
On Oct 1, 9:53=A0pm, Jon <j...@beniston.com> wrote:> > But I've seen > > one design article (carried out at NXP, the Netherlands) that claims > > they have implemented two ARM926EJ-S processors on a Xilinx Virtex 4 > > FPGA chip. I am wondering what technologies enable this > > implementation. > > The same technologies that enable any other CPU to be put on an FPGA. > The ARM926EJ-S is no different, except that it will be a lot bigger > and a lot slower, than other FPGA specific CPUs. > > > 1. How to implement one or more such ARM926EJ-S cores on a FPGA chip > > Talk to ARM, but you probably can't afford it. > > Jonhttp://www.elektroniknet.de/home/embeddedsystems/news/n/d/ohne-lizenz-zum-e= igenen-arm-soc-1/
Reply by ●October 2, 20092009-10-02
> http://www.elektroniknet.de/home/embeddedsystems/news/n/d/ohne-lizenz...That's not a 926 though, is it? Jon
Reply by ●October 2, 20092009-10-02
On Sep 30, 10:15=A0pm, Mike Treseler <mtrese...@gmail.com> wrote:> LucienZ wrote: > > Hi everyone, I am a master student and this is my first post in this > > group. My research group is looking for a multicore embedded platform > > for deploying an in-house developed computer vision algorithm. I've > > checked some available development boards and now still weigh the > > ideas in my mind. > > I might verify that the algorithm is amenable > to parallel processing by borrowing a rack > of servers before I took on building > the same thing on an fpga. > > =A0 =A0 =A0-- Mike TreselerThanks for your advice Mike! There are some obvious sections in the algorithm that I believe can be parallelized e.g. for-loops that process each line (independent on other lines) of the pixel matrix. I also plan to do some verification work before a real implementation on FPGAs. But server racks may not be easily accessible for me. So I am thinking about some tools like Pthread or OpenMP... (not used before). Do you have more suggestions for doing such a verification work?
Reply by ●October 2, 20092009-10-02
On Oct 1, 8:53=A0pm, Jon <j...@beniston.com> wrote:> > But I've seen > > one design article (carried out at NXP, the Netherlands) that claims > > they have implemented two ARM926EJ-S processors on a Xilinx Virtex 4 > > FPGA chip. I am wondering what technologies enable this > > implementation. > > The same technologies that enable any other CPU to be put on an FPGA. > The ARM926EJ-S is no different, except that it will be a lot bigger > and a lot slower, than other FPGA specific CPUs. > > > 1. How to implement one or more such ARM926EJ-S cores on a FPGA chip > > Talk to ARM, but you probably can't afford it. > > JonThank you Jon. In my understanding, 'hard' processor cores on an FPGA are not using the FPGA fabric. They are made on the same die with FPGA fabrics by FPGA vendors e.g. PowerPC cores on Virtex products. Here the FPGA fabric is working as glue logics for interconnections or customized peripherals. Here I guess the PowerPC core on Virtex is not the same concept like Microblaze cores on Virtex. Am I right? So far I did not see a FPGA chip on market that contains a hardened ARM core on the same chip, and that is why I am asking this question. In your answer, what do you mean by 'FPGA specific CPUs'? And can you tell me more words on your mentioned 'technologies'?
Reply by ●October 2, 20092009-10-02
On Oct 1, 9:12=A0pm, "Antti.Luk...@googlemail.com" <antti.luk...@googlemail.com> wrote:> On Oct 1, 9:53=A0pm, Jon <j...@beniston.com> wrote: > > > > But I've seen > > > one design article (carried out at NXP, the Netherlands) that claims > > > they have implemented two ARM926EJ-S processors on a Xilinx Virtex 4 > > > FPGA chip. I am wondering what technologies enable this > > > implementation. > > > The same technologies that enable any other CPU to be put on an FPGA. > > The ARM926EJ-S is no different, except that it will be a lot bigger > > and a lot slower, than other FPGA specific CPUs. > > > > 1. How to implement one or more such ARM926EJ-S cores on a FPGA chip > > > Talk to ARM, but you probably can't afford it. > > > Jon > > http://www.elektroniknet.de/home/embeddedsystems/news/n/d/ohne-lizenz...Thank you too Antti. My Deutsch is poor...but I may have seen this product here: http://www.ge-research.com/arm_microcontroller.html I think they are the same thing. This is ideal for some microcontroller ASIC prototyping, but may not be very suitable for us. First I can only access the Cortex-M3 pins on one Altera FPGA, but not be able to deploy several Cortex-M3 cores on one FPGA (right?). Another thing is that I think it is too slow (50MHz) to be used for video processing.
Reply by ●October 3, 20092009-10-03
On Oct 3, 3:37=A0am, LucienZ <lucien.zh...@gmail.com> wrote:> On Oct 1, 9:12=A0pm, "Antti.Luk...@googlemail.com" > > > > <antti.luk...@googlemail.com> wrote: > > On Oct 1, 9:53=A0pm, Jon <j...@beniston.com> wrote: > > > > > But I've seen > > > > one design article (carried out at NXP, the Netherlands) that claim=s> > > > they have implemented two ARM926EJ-S processors on a Xilinx Virtex =4> > > > FPGA chip. I am wondering what technologies enable this > > > > implementation. > > > > The same technologies that enable any other CPU to be put on an FPGA. > > > The ARM926EJ-S is no different, except that it will be a lot bigger > > > and a lot slower, than other FPGA specific CPUs. > > > > > 1. How to implement one or more such ARM926EJ-S cores on a FPGA chi=p> > > > Talk to ARM, but you probably can't afford it. > > > > Jon > > >http://www.elektroniknet.de/home/embeddedsystems/news/n/d/ohne-lizenz... > > Thank you too Antti. My Deutsch is poor...but I may have seen this > product here:http://www.ge-research.com/arm_microcontroller.html > I think they are the same thing. > > This is ideal for some microcontroller ASIC prototyping, but may not > be very suitable for us. First I can only access the Cortex-M3 pins on > one Altera FPGA, but not be able to deploy several Cortex-M3 cores on > one FPGA (right?). Another thing is that I think it is too slow > (50MHz) to be used for video processing.cortex m3 is easy obtainable a license for 1000 instances cost 2500 $ this IS common knowledge i assumed you know this Antti
Reply by ●October 3, 20092009-10-03
LucienZ <lucien.zhang@gmail.com> wrote:>On Oct 1, 9:12=A0pm, "Antti.Luk...@googlemail.com" ><antti.luk...@googlemail.com> wrote: >> On Oct 1, 9:53=A0pm, Jon <j...@beniston.com> wrote: >> >> > > But I've seen >> > > one design article (carried out at NXP, the Netherlands) that claims >> > > they have implemented two ARM926EJ-S processors on a Xilinx Virtex 4 >> > > FPGA chip. I am wondering what technologies enable this >> > > implementation. >> >> > The same technologies that enable any other CPU to be put on an FPGA. >> > The ARM926EJ-S is no different, except that it will be a lot bigger >> > and a lot slower, than other FPGA specific CPUs. >> >> > > 1. How to implement one or more such ARM926EJ-S cores on a FPGA chip >> >> > Talk to ARM, but you probably can't afford it. >> >> > Jon >> >> http://www.elektroniknet.de/home/embeddedsystems/news/n/d/ohne-lizenz... > >Thank you too Antti. My Deutsch is poor...but I may have seen this >product here: http://www.ge-research.com/arm_microcontroller.html >I think they are the same thing. > >This is ideal for some microcontroller ASIC prototyping, but may not >be very suitable for us. First I can only access the Cortex-M3 pins on >one Altera FPGA, but not be able to deploy several Cortex-M3 cores on >one FPGA (right?). Another thing is that I think it is too slow >(50MHz) to be used for video processing.I very much doubt you'll get an ARM core inside an FPGA that runs fast enough. FPGAs are lousy at 'simulating' processors. Especially if you look at the MIPS per $. Implementing multiple ARM cores in an FPGA is definitily the wrong direction to solve your problem. If you want raw processing power, you should look into a PC platform or implement the algorithm in an FPGA directly IF there isn't a processor available that can do the job. I guess the project isn't big enough to go for an ASIC. -- Failure does not prove something is impossible, failure simply indicates you are not using the right tools... "If it doesn't fit, use a bigger hammer!" --------------------------------------------------------------
