Xilinx edk/modelsim/ VHDL question

I am using the Xilinx EDK to perform simulations of the embedded
PowerPC on a V2Pro.  I have had success using simply the EDK with
Modelsim but when I change the flow to the ISE as an embedded project-
I am having trouble getting the boot ROM to be read in as a
configuration in Modelsim.

The trouble has to do with assigning the blockRAM configurations to
the blockmemories once I wrapped the system_stub in a testbench.  I
was able to get this all to work with ISE when I did not embed the
processor, but once it is embedded- the blockRAM moves a level down in
the heirarchy and then the configuration statement does not compile. 
My understanding in VHDL is it is like this.... (I am improvising from
memory here)

configuration name of testbenchname is
   for behavior -- arch name
      for uut: system_stub -- unit under test
         for STRUCUTRE -- arch of system_stub
            for system_i: system -- declared system
               for structure
                  for all: blockram_types: use work.blockram_conf;
bunch of end fors and end of configuration

I stole this from the system_init file and added my new levels of
heirarchy.

It complains to me that system is not a valid component- but in the
work directory I see it there clear as day.  Is there a limit to how
far down in the heirarchy you can assign configurations?  I do not
believe so.  I tried making multiple level configurations and have had
no luck either.

If I blow this away- the PowerPC fetches from FFFFFFC and gets zero
back.  When done properly, it fetches the first opcode and I am off an
running.

Thanks,
MS

Hi,

If you compile the system_init file into "work", you can use the 
configuration specified in the file directly.
A configuration can use another configuration.

ex.
I have created a testbench "system_tb" for the system generated from XPS:

In my configuration statement I have this:

configuration tb_cfg of system_tb is
  for VHDL_TEST
    for all : system use configuration work.system_conf;
    end for;   
  end for;
end tb_cfg;

You should be able to do this for your system:

configuration conf_name of testbenchname is
   for testbench_arch
      for all : system_stub use configuration work.system_conf
      end for;
   end for;
end conf_name;


MS wrote:

>I am using the Xilinx EDK to perform simulations of the embedded
>PowerPC on a V2Pro.  I have had success using simply the EDK with
>Modelsim but when I change the flow to the ISE as an embedded project-
>I am having trouble getting the boot ROM to be read in as a
>configuration in Modelsim.
>
>The trouble has to do with assigning the blockRAM configurations to
>the blockmemories once I wrapped the system_stub in a testbench.  I
>was able to get this all to work with ISE when I did not embed the
>processor, but once it is embedded- the blockRAM moves a level down in
>the heirarchy and then the configuration statement does not compile. 
>My understanding in VHDL is it is like this.... (I am improvising from
>memory here)
>
>configuration name of testbenchname is
>   for behavior -- arch name
>      for uut: system_stub -- unit under test
>         for STRUCUTRE -- arch of system_stub
>            for system_i: system -- declared system
>               for structure
>                  for all: blockram_types: use work.blockram_conf;
>bunch of end fors and end of configuration
>
>I stole this from the system_init file and added my new levels of
>heirarchy.
>
>It complains to me that system is not a valid component- but in the
>work directory I see it there clear as day.  Is there a limit to how
>far down in the heirarchy you can assign configurations?  I do not
>believe so.  I tried making multiple level configurations and have had
>no luck either.
>
>If I blow this away- the PowerPC fetches from FFFFFFC and gets zero
>back.  When done properly, it fetches the first opcode and I am off an
>running.
>
>Thanks,
>MS
>  
>

Goran,
Yeah- I tried that too.  But I did find my problem.

I was performing the sims on the testbench file expecting it to read
the configuration.  I ran the one that worked and I realized I was
running "vsim system_conf"- and it occured to me- you have to execute
the configuration file- not the testbench.

Oh well- there is a day I will never get back.  I made a
system_stub_conf that pointed to system_conf and a testbench_conf that
pointed to that.  Modelsim did seem to like too much heirarchy in its
statements- although I have seen example where the heirarchy goes way
down.

Thanks for your help,
Mike

Goran Bilski <goran@xilinx.com> wrote in message news:<c6qfho$24m2@cliff.xsj.xilinx.com>...
> Hi,
> 
> If you compile the system_init file into "work", you can use the 
> configuration specified in the file directly.
> A configuration can use another configuration.
> 
> ex.
> I have created a testbench "system_tb" for the system generated from XPS:
> 
> In my configuration statement I have this:
> 
> configuration tb_cfg of system_tb is
>   for VHDL_TEST
>     for all : system use configuration work.system_conf;
>     end for;   
>   end for;
> end tb_cfg;
> 
> You should be able to do this for your system:
> 
> configuration conf_name of testbenchname is
>    for testbench_arch
>       for all : system_stub use configuration work.system_conf
>       end for;
>    end for;
> end conf_name;
> 
> 
> MS wrote:
> 
> >I am using the Xilinx EDK to perform simulations of the embedded
> >PowerPC on a V2Pro.  I have had success using simply the EDK with
> >Modelsim but when I change the flow to the ISE as an embedded project-
> >I am having trouble getting the boot ROM to be read in as a
> >configuration in Modelsim.
> >
> >The trouble has to do with assigning the blockRAM configurations to
> >the blockmemories once I wrapped the system_stub in a testbench.  I
> >was able to get this all to work with ISE when I did not embed the
> >processor, but once it is embedded- the blockRAM moves a level down in
> >the heirarchy and then the configuration statement does not compile. 
> >My understanding in VHDL is it is like this.... (I am improvising from
> >memory here)
> >
> >configuration name of testbenchname is
> >   for behavior -- arch name
> >      for uut: system_stub -- unit under test
> >         for STRUCUTRE -- arch of system_stub
> >            for system_i: system -- declared system
> >               for structure
> >                  for all: blockram_types: use work.blockram_conf;
> >bunch of end fors and end of configuration
> >
> >I stole this from the system_init file and added my new levels of
> >heirarchy.
> >
> >It complains to me that system is not a valid component- but in the
> >work directory I see it there clear as day.  Is there a limit to how
> >far down in the heirarchy you can assign configurations?  I do not
> >believe so.  I tried making multiple level configurations and have had
> >no luck either.
> >
> >If I blow this away- the PowerPC fetches from FFFFFFC and gets zero
> >back.  When done properly, it fetches the first opcode and I am off an
> >running.
> >
> >Thanks,
> >MS
> >  
> >