Re: Tier Logic introduces the world's first 3D FPGA

Hello,

Tier Logic wrote:
> All I can tell you is come get a quote and we can save you money.
it is a curious statement !
I assume that you have been too long in "stealth mode".

Now I tell you this :
"show me your public price list, your products,
demo boards, detailed datasheet and distributors.
Then maybe I'll choose you for a project".

I'll take the example of a competitor.
SiliconBlue has maybe "slow" chips
(according to only one test I did) but they got
it almost right for the rest, at least for me :
  - decent development tool (not bloated)
     that installs easily on Linux AND Windows !
  - datasheet and other informations, enough to understand
     how it is ticking inside so it can be used
  - at least one distributor that talks to anyone
     (even though the distributor is not large,
      at least it does its job and doesn't scare potential customers)
  - unit price that is decent is small quantities.
  - ultra-low power is a plus but not critical for me.

And still it's not functional enough for me.
Antti has developped for it and I'm curious.
Now before you can save me money, try to beat SBt,
and then... beat the others :-P
The Actel ProAsic3 family is working very fine
for me and wonder how it can be displaced.

good luck,

> Regards,
> Jeff
yg

-- 
http://ygdes.com / http://yasep.org

On 11 Mrz., 21:19, Tier Logic <jeff.ka...@gmail.com> wrote:
> The extra processing steps for the TFT do cost more. However, the die
> size reduction swamps that out to create a low cost FPGA. The ASIC
> gets rid of that extra cost and benefits from the yield improvement
> for an even lower cost solution.
>
> All I can tell you is come get a quote and we can save you money.
> Xilinx and Altera love all the skepticism here and want you to
> conitnue paying too much for your solutions.

Isnt the biggest area in FPGAs covered by routing (lines & switches)
which are still present in Tier Logic?

Anyway it looks interesting to me and i have registered to evaluate
further...

But one thing i am concerned with is design security of the
programmable devices.

On Mar 11, 12:19=A0pm, Tier Logic <jeff.ka...@gmail.com> wrote:
>
> Xilinx and Altera love all the skepticism here and want you to
> conitnue paying too much for your solutions.
>
> Regards,
>
> Jeff

Jeff, you should be ashamed of that cheap shot, especially when Austin
earlier today invited the audience to check out your alleged lower
prices.
I can understand when a newcomer is aggressive in his claims, and
nebulous in his explanations. But do not get sarcastic and nasty.
You still have a lot to prove before you can climb on a high horse.
Peter Alfke

On Mar 12, 9:19=A0am, Tier Logic <jeff.ka...@gmail.com> wrote:
>
> All I can tell you is come get a quote and we can save you money.
> Xilinx and Altera love all the skepticism here and want you to
> conitnue paying too much for your solutions.

 So you have real, shipping silicon ? Great!

You claim 'we can save you money', Great too!!
- I love a clairvoyant supplier, who knows already
what packages and prices points I have!!.

- now tell me what packages, speeds and logic counts
you offer, as before I can _actually_ 'save money' here in the real
world, first the product actually has to be functional in a circuit
board that I can sell !!

-jg

On Mar 12, 10:31=A0am, whygee <y...@yg.yg> wrote:
> I'll take the example of a competitor.
> SiliconBlue has maybe "slow" chips
> (according to only one test I did)....
> The Actel ProAsic3 family is working very fine
> for me and wonder how it can be displaced.

We have ProASIC3 and SiliconBlue on a short list.
[maybe SmartFusion too, depends on $/package choices]

I'm interested in how much slower were the SiliconBlue devices ?
What tests did you do to compare them ?

-jg

-jg wrote:
> On Mar 12, 10:31 am, whygee <y...@yg.yg> wrote:
> We have ProASIC3 and SiliconBlue on a short list.
> [maybe SmartFusion too, depends on $/package choices]
wait a bit before things stabilize
and the distributors sing to the same tune.

I met Future and Actel France
today at the annual parisian Actel seminar,
I was not interested by their new offering,
I'm waiting for an eventual next generation with
a better SRAM/logic ratio.

> I'm interested in how much slower
 > were the SiliconBlue devices ?
> What tests did you do to compare them ?
disclaimer : I'm not as good as Antti ;-)
HE has the boards and can tell more acurate
stories than mine.

I "only" installed their SW, and tried to
compile a simple adder design, probably
http://yasep.org/VHDL/asu_rop2/testdiff.vhd (test nr 1)
http://yasep.org/VHDL/asu_rop2/ASU_ROP2_16.vhd
and got such a low MHz rating that I thought
that I hit the wrong button or something like that.
I tweaked many stuff and could not influence
the result much, tried different architectures...
and I gave up.
It just means that it did not meet my expectations.
I know that SBt's chips are created for ultraultralow power
and low speed. I'm not expecting Virtex performance
but i'm demanding anyway ;-)

If you want acurate figures, I prefer that you
try yourself, because i'm not sure why it is slow.
i've read "80MHz performance" or something like that
in the datasheets at the time
but like other FPGA claims, i'm not able to reach them.
I've seen people able to do about 300MHz designs
with ProASIC, I can only do 100MHz and Actel's
soft ARM maxes at around 60MHz... for a chip that
is meant to be "able of 350MHz".

so test yourself :-)

> -jg
yg

-- 
http://ygdes.com / http://yasep.org

On Mar 11, 4:31=A0pm, whygee <y...@yg.yg> wrote:
> Hello,
>
> Tier Logic wrote:
> > All I can tell you is come get a quote and we can save you money.
>
> it is a curious statement !
> I assume that you have been too long in "stealth mode".
>
> Now I tell you this :
> "show me your public price list, your products,
> demo boards, detailed datasheet and distributors.
> Then maybe I'll choose you for a project".
>
> I'll take the example of a competitor.
> SiliconBlue has maybe "slow" chips
> (according to only one test I did) but they got
> it almost right for the rest, at least for me :
> =A0 - decent development tool (not bloated)
> =A0 =A0 =A0that installs easily on Linux AND Windows !
> =A0 - datasheet and other informations, enough to understand
> =A0 =A0 =A0how it is ticking inside so it can be used
> =A0 - at least one distributor that talks to anyone
> =A0 =A0 =A0(even though the distributor is not large,
> =A0 =A0 =A0 at least it does its job and doesn't scare potential customer=
s)
> =A0 - unit price that is decent is small quantities.
> =A0 - ultra-low power is a plus but not critical for me.
>
> And still it's not functional enough for me.
> Antti has developped for it and I'm curious.
> Now before you can save me money, try to beat SBt,
> and then... beat the others :-P
> The Actel ProAsic3 family is working very fine
> for me and wonder how it can be displaced.
>
> good luck,

I'm curious, how many devices do you use in a year.  I will bet if you
use less than 100k and possibly, 1 million, you won't get their
attention or even a quote.

Any takers?

Rick

On Mar 12, 10:22=A0pm, rickman <gnu...@gmail.com> wrote:
>
> I'm curious, how many devices do you use in a year. =A0I will bet if you
> use less than 100k and possibly, 1 million, you won't get their
> attention or even a quote.
>
> Any takers?
>
> Rick

They quoted "free NRE" for a purchase commitment of $100k, I believe.
So if you want $100k worth of parts, I think they're already on board.

I just don't have a clue as to whether these are low cost and
performance devices, high performance and high density chips, or just
what they're shooting for.  If they don't hit the aggressive
production nodes for the base layers (with a coarser layer 9 metal
mask process for a cheaper customization) then how can they truly
compete on the piece costs given the overhead for routing resources?

Whatever.

hi rick !

rickman wrote:
> On Mar 11, 4:31 pm, whygee <y...@yg.yg> wrote:
>> Now before you can save me money, try to beat SBt,
>> and then... beat the others :-P
>> The Actel ProAsic3 family is working very fine
>> for me and wonder how it can be displaced.
>>
>> good luck,
> 
> I'm curious, how many devices do you use in a year.
less than you :-)

I have been qualified as a "creative" kind of guy by
the Actel France manager. I have a very small, specialised
niche market around Paris and I love it this way.

> I will bet if you use less than 100k and possibly,
 > 1 million, you won't get their attention or even a quote.
I can get quotes from others, so why not from TierLogic ?

> Any takers?
I'm curious :-)

> Rick
yg

-- 
http://ygdes.com / http://yasep.org

John_H wrote:
> They quoted "free NRE" for a purchase commitment of $100k, I believe.
> So if you want $100k worth of parts, I think they're already on board.
It just mean that their scheme accepts cheques > $100K ;-)

> I just don't have a clue as to whether these are low cost and
> performance devices, high performance and high density chips, or just
> what they're shooting for.
I don't even see a simple mention of the characteristics
of the actual devices proposed. How many LUTs ?
what goodies ? (PLL ? ROM ? SRAM ? DDR ?...)

> Whatever.
yups.

-- 
http://ygdes.com / http://yasep.org