Any advice on which is the best book on CMOS digital circuit design?

Hi,
I want to buy books on  CMOS digital circuit designs. Any advice on
which is the best book on CMOS digital circuit design?

I know the best textbook on software programming is a book written by
MIT 4 professors "The Introduction to Algorithms".

Knuth's "The Art of Computer Programming" 1-3 volumes are good, and I
have read all of them, but they are at too low levels and cover too
limited research area.

I hope to buy the same books on CMOS digital circuit designs, even
though many experts may have different points of views.

Thank you.

Weng

Weng Tianxiang wrote:
> I want to buy books on  CMOS digital circuit designs. Any advice on
> which is the best book on CMOS digital circuit design?

At least "Nanometer CMOS ICs, From Basics to ASICs" written by Harry
Veendrick is quite nice overall book and is up to date with the
technology. The only problem with the book is the price, which is
quite high.

--Kim

On Mar 16, 11:44=A0pm, Kim Enkovaara <kim.enkova...@iki.fi> wrote:
> Weng Tianxiang wrote:
> > I want to buy books on =A0CMOS digital circuit designs. Any advice on
> > which is the best book on CMOS digital circuit design?
>
> At least "Nanometer CMOS ICs, From Basics to ASICs" written by Harry
> Veendrick is quite nice overall book and is up to date with the
> technology. The only problem with the book is the price, which is
> quite high.
>
> --Kim

Hi Kim,
Thank you for your recommendation.

The book contains materials of full procedures to make an ASIC in
nanometer CMOS.

I just want CMOS logic circuit in nanometer in 32um technology, for
example, domino logic, time borrowing, how to expand an adder
operation into 15 levels and something like that.

I have ordered two books on Internet:

1. Principles of CMOS VLSI Design (Hardcover), second edition, 1999

~ Neil H. E. Weste (Author), Kamran Eshraghian (Author)

$0.01
+ $3.99shipping

2. Logical Effort: Designing Fast CMOS Circuits (The Morgan Kaufmann
Series in Computer Architecture and Design) by Ivan Sutherland, Robert
F. Sproull, and David Harris (Paperback - Feb. 16, 1999)
Buy new: $69.95 $62.95

7 new from $30.00
16 used from $24.25

I may buy another book "Principles of CMOS VLSI Design (Hardcover)",
third edition, 2010, written by  Neil H. E. Weste and David Harris
when I finish reading the second edition.

Weng

On Mar 17, 12:21=A0pm, Weng Tianxiang <wtx...@gmail.com> wrote:
> On Mar 16, 11:44=A0pm, Kim Enkovaara <kim.enkova...@iki.fi> wrote:
>
> > Weng Tianxiang wrote:
> > > I want to buy books on =A0CMOS digital circuit designs. Any advice on
> > > which is the best book on CMOS digital circuit design?
>
> > At least "Nanometer CMOS ICs, From Basics to ASICs" written by Harry
> > Veendrick is quite nice overall book and is up to date with the
> > technology. The only problem with the book is the price, which is
> > quite high.
>
> > --Kim
>
> Hi Kim,
> Thank you for your recommendation.
>
> The book contains materials of full procedures to make an ASIC in
> nanometer CMOS.
>
> I just want CMOS logic circuit in nanometer in 32um technology, for
> example, domino logic, time borrowing, how to expand an adder
> operation into 15 levels and something like that.
>
> I have ordered two books on Internet:
>
> 1. Principles of CMOS VLSI Design (Hardcover), second edition, 1992
>
> ~ Neil H. E. Weste (Author), Kamran Eshraghian (Author)
>
> $0.01
> + $3.99shipping
>
> 2. Logical Effort: Designing Fast CMOS Circuits (The Morgan Kaufmann
> Series in Computer Architecture and Design) by Ivan Sutherland, Robert
> F. Sproull, and David Harris (Paperback - Feb. 16, 1999)
> Buy new: $69.95 $62.95
>
> 7 new from $30.00
> 16 used from $24.25
>
> I may buy another book "Principles of CMOS VLSI Design (Hardcover)",
> third edition, 2010, written by =A0Neil H. E. Weste and David Harris
> when I finish reading the second edition.
>
> Weng

Hi,
I have received both books:
1. Principles of CMOS VLSI Design (Hardcover), second edition, 1992
 Neil H. E. Weste (Author), Kamran Eshraghian (Author)
2.  Logical Effort: Designing Fast CMOS Circuits (The Morgan Kaufmann
Series in Computer Architecture and Design) by Ivan Sutherland, Robert
F. Sproull, and David Harris (Paperback - Feb. 16, 1999).

After brief reviewing,
The first one is really good so why it receives more than 3k
references in Google search. I have no any knowledge about CMOS. Now
after reading I may have a full picture of it.
It is a background knowledge and I like it even though it was
published in 1992.
The second one is basically useless.
The reason is the estimate of a logic speed and how they are generated
in most efficient way
are the topics of HDL compilers and it becomes other people's
business, not a digital logic designer's business.

Weng

> The second one is basically useless.
> The reason is the estimate of a logic speed and how they are generated
> in most efficient way
> are the topics of HDL compilers and it becomes other people's
> business, not a digital logic designer's business.

Hi Weng,

I do not know the book, but it is hard for me to not disagree with the
statement, that a digital logic designer is not responsible for the
speed of the circuit. Especially when you are talking about domino
logic, etc. in your other posts, when I remember right ;-)

Regards,

Thomas

In comp.arch.fpga Thomas Entner <thomas.entner@entner-electronics.com> wrote:
(snip)
 
> I do not know the book, but it is hard for me to not disagree with the
> statement, that a digital logic designer is not responsible for the
> speed of the circuit. Especially when you are talking about domino
> logic, etc. in your other posts, when I remember right ;-)

I disagree.  In many FPGA projects, speed is the reason for doing
the project.  Many things can be done on existing processors, but
not quite fast enough.  The primary goal, then, is to design
the logic to be fast.  In the case of pipelined arrays, one
might need to maximize speed/cost, which is, again, a logic
design problem.  

There are also many problems where speed isn't so important.

-- glen

On Mar 26, 4:14=A0pm, glen herrmannsfeldt <g...@ugcs.caltech.edu> wrote:

> I disagree. =A0In many FPGA projects, speed is the reason for doing
> the project. =A0Many things can be done on existing processors, but
> not quite fast enough. =A0The primary goal, then, is to design
> the logic to be fast. =A0In the case of pipelined arrays, one
> might need to maximize speed/cost, which is, again, a logic
> design problem. =A0
>
> There are also many problems where speed isn't so important.

Well, to be fair, the discussion about speed was about CMOS design,
and transistor-level CMOS is a different skill than digital design
(although it often resides in the same individual).

But to your point about FPGAs, I agree that an "FPGA designer" often
needs to be acutely aware of how to make things go fast in an FPGA
(which is often more a matter of being willing to experiment, and
certainly doesn't require the same low-level hardware understanding as
dealing with domino logic does).  Where I work, we build real chips,
but emulate them in FPGAs.  Gates are so cheap these days, and the
real silicon is so fast, that my mantra to the digital designers is
always to make it work well and fast in the FPGA, and the chip will
take care of itself.  If you code in a fashion that is designed to be
highly optimized for real silicon, sure you might save a milli-cent
per chip, but if you weren't able to emulate it at speed (or even if
you were able to emulate it at speed, but only through heroic work by
the FPGA emulator guy and multiple 30 hour PAR sessions), that could
cost you a lot more than your putative savings.

Regards,
Pat

On Mar 26, 5:12=A0pm, Patrick Maupin <pmau...@gmail.com> wrote:
> On Mar 26, 4:14=A0pm, glen herrmannsfeldt <g...@ugcs.caltech.edu> wrote:
>
> > I disagree. =A0In many FPGA projects, speed is the reason for doing
> > the project. =A0Many things can be done on existing processors, but
> > not quite fast enough. =A0The primary goal, then, is to design
> > the logic to be fast. =A0In the case of pipelined arrays, one
> > might need to maximize speed/cost, which is, again, a logic
> > design problem. =A0
>
> > There are also many problems where speed isn't so important.
>
> Well, to be fair, the discussion about speed was about CMOS design,
> and transistor-level CMOS is a different skill than digital design
> (although it often resides in the same individual).
>
> But to your point about FPGAs, I agree that an "FPGA designer" often
> needs to be acutely aware of how to make things go fast in an FPGA
> (which is often more a matter of being willing to experiment, and
> certainly doesn't require the same low-level hardware understanding as
> dealing with domino logic does). =A0Where I work, we build real chips,
> but emulate them in FPGAs. =A0Gates are so cheap these days, and the
> real silicon is so fast, that my mantra to the digital designers is
> always to make it work well and fast in the FPGA, and the chip will
> take care of itself. =A0If you code in a fashion that is designed to be
> highly optimized for real silicon, sure you might save a milli-cent
> per chip, but if you weren't able to emulate it at speed (or even if
> you were able to emulate it at speed, but only through heroic work by
> the FPGA emulator guy and multiple 30 hour PAR sessions), that could
> cost you a lot more than your putative savings.
>
> Regards,
> Pat

Thomas,
1. Speed is the life of a digital design.
2. When dealing with FPGA, I know how a logic design affects its speed
by counting how many number of inputs are there for a logic equation,
no more than that.
3. When dealing with modern more than 1GHz ASIC, all logic may be
implemented as a domino logic which has nothing to do with how a non-
domino logic is compiled by a compiler.

In both situation, one doesn't have to know how a non-domino logic is
compiled.

For example, it is to determine if a 32-bit data is a data zero by
following equation:
IsZero <=3D a1 or a2 or ... or a31;

A digital circuit designer for either FPGA or modern more than 1GHz
ASIC doesn't have to understand how the logic is compiled by a
compiler:
IsZero <=3D (a1 or a2 or ... or a4) or ... (a30 or a31);
or
IsZero <=3D (a1 or a2 or ... or a3) or ... (a28 ... or a31);

The book:  Logical Effort: Designing Fast CMOS Circuits (The Morgan
Kaufmann
Series in Computer Architecture and Design) by Ivan Sutherland,
Robert
F. Sproull, and David Harris (Paperback - Feb. 16, 1999)
tells that when 4 inputs of OR gates may be the fastest.

The information is really useless.

Weng

Some good CMOS references:

1. Principles of CMOS VLSI Design by Weste/Harris
2. Digital Integrated Circuit Design: From VLSI Architectures to CMOS
Fabrication by Hubert Kaselin
3. CMOS Digital Integrated Circuits: Analysis and Design S.M. Kang and
Y. Leblebici
4. Low power design by Chandrakasan/Brodersen.
5. You can also look at books by John P. Uyemura but they might be
quite old.

Hope this helps.

On Mar 30, 8:30=A0pm, pallav <pallavgu...@gmail.com> wrote:
> Some good CMOS references:
>
> 1. Principles of CMOS VLSI Design by Weste/Harris
> 2. Digital Integrated Circuit Design: From VLSI Architectures to CMOS
> Fabrication by Hubert Kaselin
> 3. CMOS Digital Integrated Circuits: Analysis and Design S.M. Kang and
> Y. Leblebici
> 4. Low power design by Chandrakasan/Brodersen.
> 5. You can also look at books by John P. Uyemura but they might be
> quite old.
>
> Hope this helps.

Hi Pallav,
Thank you.

I have bought Principles of CMOS VLSI Design, second edition, by
Weste, I am very happy to have the 2nd edition.

Harris later appended some chapters to the 3rd edition to make it the
4th edition.

I think it may be enough for me to have the 2nd edition. Because I
need only the basic knowledge about CMOS.

I am interested in logic design and computer architecture. With CMOS
knowledge it may help get faster designs.

Weng