problem while adding externa MIG IP in design

Dear ALL I am facing this error time to time due to external IP


Place:1240 - Placement has failed for the IP core generated by MIG because
   non-related components have been locked to slice locations required for
the
   MIG core.  Please change or remove the location constraints for these
   non-related components so that they don't conflict with MIG placement. 
Below
   is a list of the slice locations, and the component that is currently
locked
   to this location:
   Slice Location      Currently Locked Component              
   ----------------    -----------------------------------     
   SLICE_X0Y42        
  
mig_33_0/mig_33_0/u_ddr2_top_0/u_mem_if_top/u_phy_top/u_phy_io/gen_dq[5].u_io
   b_dq/stg2a_out_fall

In my ucf I did not lock this variable 
some time edk + ise generates bit file
but if i do some modification in rapper used to collect data from IP it
start giving errors

Kindly guide me how to remove those errors (I am not using gen_dq bit in my
wrapper)

Is there a way to reLOCK this pin
or bypass this error

Waiting for reply
Regards

	   
					
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