Best syntheses

Hi,

I have been using Xilins XST for a while and have come to a performance 
problem which leads me to think of if there is any better syntheses like 
Synopsys or other.

The device is a Spartan3 4000 an I use Xilinx 13.1 since a couple weeks 
ago after a upgrade from 9.2

Anyone that can share some experience of syntheses?

/michael

You will get a bit better performance with Synplify, but do you really want
to have to pay a lot of money for it. Not sure of the current price of
Synplify but I think its in the thousands of dollars. I would of thought
you would be better off using a faster fpga like Spartan 6.

Jon	   
					
---------------------------------------		
Posted through http://www.FPGARelated.com

Hi,
On 05/13/11 05:41 PM, maxascent wrote:
> You will get a bit better performance with Synplify, but do you really want
> to have to pay a lot of money for it. Not sure of the current price of
> Synplify but I think its in the thousands of dollars. I would of thought
> you would be better off using a faster fpga like Spartan 6.
>
> Jon	
Yes I know the price, I would be in the range of $1-20000 I guess, that 
is the same as one month of work.

A newer FPGA would be great but not when you have systems all over the 
planet, that will make Synplicity a bargain if it does the job :)

Have you lately done something with Synplicity and Xilinx 13.1?

/michael

To be honest I think you can probably multiply your Synplify estimate by
about x5. Anyway I dont really think you are going to get something like a
50% perfromance increase with Synplify, maybe 10% or 20%. I think that XST
has improved a lot and the gap to the other tools isn't as big as it maybe
was a few years back. I can't believe that you are getting worst
performance by upgrading to to 13.1 from what you had with an older
version. What frequency are you tring to achieve and how much is it
failing?

Jon	   
					
---------------------------------------		
Posted through http://www.FPGARelated.com

Hi,

On 05/13/11 07:16 PM, maxascent wrote:
> To be honest I think you can probably multiply your Synplify estimate by
> about x5. Anyway I dont really think you are going to get something like a
> 50% perfromance increase with Synplify, maybe 10% or 20%. I think that XST
> has improved a lot and the gap to the other tools isn't as big as it maybe
> was a few years back. I can't believe that you are getting worst
> performance by upgrading to to 13.1 from what you had with an older
> version. What frequency are you tring to achieve and how much is it
> failing?
>
Who said 13.1 was worse than 9.2, I did not say that!

My question was if you or anyone else have any experience with the 
latest Xilinx and a third party syntheses tool!

/michael

I misunderstood and thought that you where saying that you had a design in
9.2 which was fine and after moving to 13 you have problems. I guess it
depends by how much you are missing timing to if Synplify would help you.
Personally I would think it will not make a big improvement over XST.

Jon	   
					
---------------------------------------		
Posted through http://www.FPGARelated.com

Hi,

On 05/14/11 01:04 PM, maxascent wrote:
> I misunderstood and thought that you where saying that you had a design in
> 9.2 which was fine and after moving to 13 you have problems. I guess it
> depends by how much you are missing timing to if Synplify would help you.
> Personally I would think it will not make a big improvement over XST.
>
> Jon	
No,I have design and it needs to be improved I and I don't belive in 
some fantastic tool or miracle which means that I need to try and gain 
10-15% here and there in the hope that the result will be the 50-60% I 
need to make it work.

/michael

On Sat, 14 May 2011 14:35:06 +0200, Michael wrote:

> Hi,
> 
> On 05/14/11 01:04 PM, maxascent wrote:
>> I misunderstood and thought that you where saying that you had a design
>> in 9.2 which was fine and after moving to 13 you have problems. I guess
>> it depends by how much you are missing timing to if Synplify would help
>> you. Personally I would think it will not make a big improvement over
>> XST.
>>
>> Jon
> No,I have design and it needs to be improved I and I don't belive in
> some fantastic tool or miracle which means that I need to try and gain
> 10-15% here and there in the hope that the result will be the 50-60% I
> need to make it work.
> 

Don't expect 50-60% speed improvement from a different synthesis tool!
Look at re-architecting the design itself. Identify the slow parts and 
improve them. If you can add one or more pipeline stages this is 
relatively easy, but if you can't add a pipeline stage, can you move part 
of the critical computation to an earlier or later stage?

There are some benefits to be had from floorplanning the speed-critical 
sections, perhaps explore if PlanAhead can help you meet your targets.

Finally, the next highest speed grade on the chip itself may be worth up 
to 15%.

- Brian

HI,

On 05/14/11 09:32 PM, Brian Drummond wrote:
> On Sat, 14 May 2011 14:35:06 +0200, Michael wrote:
>
>> Hi,
>>
>> On 05/14/11 01:04 PM, maxascent wrote:
>>> I misunderstood and thought that you where saying that you had a design
>>> in 9.2 which was fine and after moving to 13 you have problems. I guess
>>> it depends by how much you are missing timing to if Synplify would help
>>> you. Personally I would think it will not make a big improvement over
>>> XST.
>>>
>>> Jon
>> No,I have design and it needs to be improved I and I don't belive in
>> some fantastic tool or miracle which means that I need to try and gain
>> 10-15% here and there in the hope that the result will be the 50-60% I
>> need to make it work.
>>
>
> Don't expect 50-60% speed improvement from a different synthesis tool!
For sure no, I was hoping that a change of synth would make say 10-15% 
then I would make it a go.

But, have you used any other synth tools lately?

> Look at re-architecting the design itself. Identify the slow parts and
> improve them. If you can add one or more pipeline stages this is
> relatively easy, but if you can't add a pipeline stage, can you move part
> of the critical computation to an earlier or later stage?
>
This is where I expect to gain the remaining 30-40 %, but as I wrote I 
need to try both a tool change and recoding some parts.
> There are some benefits to be had from floorplanning the speed-critical
> sections, perhaps explore if PlanAhead can help you meet your targets.
>
Hmm, I have actually never exlored PlanAhead if that would help. Have 
you used it?

> Finally, the next highest speed grade on the chip itself may be worth up
> to 15%.
>
> - Brian
I already have the fastest and all boards are also already made and in 
use so that is not an option.

/michael

On Sun, 15 May 2011 08:47:21 +0200, Michael wrote:

> HI,
> 
> On 05/14/11 09:32 PM, Brian Drummond wrote:
>> On Sat, 14 May 2011 14:35:06 +0200, Michael wrote:

>> Don't expect 50-60% speed improvement from a different synthesis tool!
> For sure no, I was hoping that a change of synth would make say 10-15%
> then I would make it a go.
> 
> But, have you used any other synth tools lately?

Mentor Leonardo (years ago!) but not lately. 
I found my time better spent on improving the design, but YMMV.

>> Look at re-architecting the design itself. 
> This is where I expect to gain the remaining 30-40 %, but as I wrote I
> need to try both a tool change and recoding some parts.

Do you have any specific reason for believing the improvement here is so 
limited?

>> There are some benefits to be had from floorplanning the speed-critical
>> sections, perhaps explore if PlanAhead can help you meet your targets.
>>
> Hmm, I have actually never exlored PlanAhead if that would help. Have
> you used it?

Not PlanAhead but in the ISE 6.1/7.1 era I played extensively with the 
earlier Floorplanner, now replaced by PlanAhead. It had serious problems 
supporting hierarchical and reusable blocks, but...

I could take a block that PARed at 80MHz and get 120MHz out of it with 
careful floorplanning, and (working around said problems) reuse that 
block multiple times with PAR placing less critical parts of the design.
However, above a certain level of congestion, PAR would route other 
signals through my carefully floorplanned blocks, destroying some of the 
additional performance.

Now (1) I can't say how this gain transfers to PlanAhead, and (2) PAR 
might get closer to optimal performance these days, but it's definitely 
worth looking into as a source of improvement.

- Brian