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TinyFPGA BX Creating Two OR Gates

Started by Joe3502 6 months ago1 replylatest reply 3 months ago31 views

Hi all, 

First off, I hope that you and your families are staying safe and well during this time of global pandemic. 

I just received my TinyFPGA in the mail yesterday and I need to create two OR gates for a project to start out with. I made the code for them using what I have already learned, but I am not sure how to define my inputs and outputs to specific pins on the TinyFPGA itself. 

Here is the code that I currently have:

or gate pic_28122.png

Thank you and stay safe,

Joe M



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Reply by mon2July 30, 2020

Hi Joe. Also learning the ropes with FPGA programming using Verilog. Using the Lattice toolchains and reporting the never ending errors in their documentation in the process.

On your (old) post, you need to create yet another text file that will be the constraint file. Inside this constraint file, you will map your input / output pins to physical port pins for the FPGA package you are planning to use on your kit.

We recently closed a design with the Lattice ICE40UL1K (8 pin DIP size) and had a similar learning curve.

Using ICECube2 for our development on Windows.


Here is the output from our PCF file for a recent project (as an example):

# ##############################################################################

# iCEcube PCF

# Version: 2017.08.27940

# File Generated: Jul 14 2020 10:52:20

# Family & Device: iCE40UL1K

# Package: SWG16

# ##############################################################################

###IOSet List 1

set_io rgb0 B4

set_io rgb1 A4

set_io rgb2 C4

set_io pushbutton A1

set_io bar_code_pin A2