In a project I'm working on an FPGA, I'm converting a 48-bit MAC address to 16-bit using the Hash algorithm. RAM size is 2^16 bits and I have 8 ETHERNET ports. I am using the resulting hash as ramin address port. Each ethernet port has multiple source addresses. The questions start here.

1) example: A packet with source address A was received from ethernet port 8. After passing the 48-bit A source mac address through the hash algorithm, the 16-bit X ram address is formed. When going to the B ram address, the 1st port information -> "10000000" is written.

 A packet with source address B arrived from Ethernet port 1. After passing the 48-bit B source mac address through the hash algorithm, the 16-bit X ram address is formed. Going to B ram address, 1st port information -> "10000001" is written.

Currently, if a destination MAC address with the same X ram hash address comes in, it will be forwarded to both port 8 and port 1.

Is this operation correct or how can it be done with another operation?

2) Since there is no RAM reset process in FPGA, how can I periodically delete the MAC Table addresses I wrote to the RAM?