hi all !
I am doing a BER (BIT ERROR RATE) in vhdl and I have to put 2 registers clear on read which counts the number of words in error and the number of bits in error. i want to know what is a register clear on raed and how i can code a register clear on read in vhdl?
Clear on read means that when the host processor reads the data from your peripheral, the registers should reset themselves to zero.
Within your bus interface block you will have some logic which multiplexes the registers out to the databus when a read happens, based on the incoiming address. The logic that manages that can be used to create a single-cycle signal, one for each register, which you can use as a synchronous reset on the registers in question. If you already have a sync reset you can 'or' this new signal in (assuming active high reset):
process (clk) begin if rising_edge(clk) then if reset='1' or i_was_read_by_the_host='1' then reg_value <= (others => '0'); else etc...
thank you all is clear now!
When read signal is active register is reset to "0" and read_bus <= register_val. Status registers, interrupt registers, statistics counters are implemented this way.