I am an FPGA design engineer having worked designing SONET/SDH telecommunication equipment for close to 8.5 years. I also do a bit of Embedded design with ARM and ATMEGA32 based micros. I am pursuing my PhD in Asynchronouos Circuit Design at RMIT University in Melbourne.

Good you found the qsfIf you open the file at DUEPROLOGIC_USB_FPGA_PROJECT_2.8_DVD\Projects_HDL\EPT_4CE6_AF_Platform_Demo\EPT_4CE6_AF_Platform_Demo\EPT_4CE6_AF_D1_Top\EPT_4CE6_AF_D1_Top.qsf,...
The DueProLogic website has a sample projects zip https://www.earthpeopletechnology.com/products-pag...Inside the sample project zip file you will find the following...

Re: Suggest a FPGA project

Reply posted 3 years ago (01/07/2019)
I agree with Olivier about requirements 1 and 4,5 being slightly out of sync. Virtex2Pro has been around for more than 15 years now. The logic one can fit inside...

Re: Mux versus internal high impledance

Reply posted 4 years ago (05/06/2018)
Hello Martin,Thank you for your reply. I agree with your design principle that it is inadvisable to use design patterns that are unlikely to be recognised. Will...

Re: Mux versus internal high impledance

Reply posted 4 years ago (05/06/2018)
Hello Rajkeerthy18,Thank you for your reply. However, I do not agree with your statement that either ASIC/FPGA do not permit Tristate within the fabric. As I have...

Re: Is an ACM subscription worthwhile?

Reply posted 4 years ago (05/04/2018)
I am an FPGA design engineer and work at a University, so I have access to both ACM and IEEE publications through the University library. I have found that there...

Mux versus internal high impledance

New thread started 4 years ago
Hi, I have been an FPGA designer for more than a decade now and tutor a class on FPGA design at University presently. In all these years, I have had two ways of...

Re: FPGA curve fitting

Reply posted 4 years ago (09/05/2017)
Hello Kiyoshi,If I read it correctly, you need some way for the FPGA to compute the functions that would typically be implemented in C or Python to derive the parameters...

Re: Makefiles and FPGA projects

Reply posted 4 years ago (08/15/2017)
Hello Ptorru,I appreciate your idea of creating a post detailing the challenges and solutions when you go about designing a makefile based build system for FPGA...

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