FPGARelated.com

Shayne Murray (@qbitrex)

Semi-Retired Database Programmer in another life. Currently devoted to Quantum Computing through my Website qbitrex.com. Currently investigating the Mojo Spartan/Arduino board using primitive logic gates to investigate Metastability.

Re: Synchronizing Multiple FPGA Prototype Boards

Reply posted 7 years ago (03/07/2017)
Thanks Pedro.Yep the Oscilloscope is on the wish list.I should be running 16 LEDs on 4 registers using my trainer Mojo FPGA within a couple of weeks.Then it will...

Re: Synchronizing Multiple FPGA Prototype Boards

Reply posted 7 years ago (03/07/2017)
Thanks rajkeerthy18 for your reply and for clarifying the problem.1. Ok forget about TCK it's part of a debug standard. Now I what the TMS,TDO, and TDI pins are...

Synchronizing Multiple FPGA Prototype Boards

New thread started 7 years ago
My project requires large numbers of IO lines.I love the dedicated ATmega32U4 processor for serial comms on the Mojo, it runs lickety split with it's cut down optimised...

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