thnaks..
luckily, I found a program in the web that generates a complete ethernet packet.
This is the link if anyone needs a similar thing..
http://www.fpga4fun.com/10BASE-T2.html
Regards, Moti.
>
> >Hy guys, I'm currently working on a 10/100 ETHERNET mac implementation
> >in an FPGA (using vhdl). in order to simulate my state machine I need
> >to feed a real ETHERNET packet to it (in order to see if the crc check
> >is exeuted correctly etc.). I will realy appreciate to get a complete
> >ETHERNET packet (all bytes from PREAMBLE to FCS) so I could insert it
> >to my modelsim simulation.
> >
> >the format I'm expecting is as follows..
> >
> >[55][55][55]... -> .. [FCS3][FCS2][FCS1][FCS0]
>
> You could use a network sniffer to capture a packet from your LAN.
> This will not capture the preamble and is unlikely to capture the CRC.
> You may get lucky though.
> I just checked with Ethereal ( http://www.ethereal.com/ ) and it
> didn't capture the CRC on my hardware :(
>
> Or, you could ask on news:comp.dcom.lans.ethernet, where this question
> would be on-topic.
>
> Regards,
> Allan.
Reply by Allan Herriman●July 12, 20042004-07-12
On 12 Jul 2004 01:43:55 -0700, moti@terasync.net (Moti Cohen) wrote:
>Hy guys, I'm currently working on a 10/100 ETHERNET mac implementation
>in an FPGA (using vhdl). in order to simulate my state machine I need
>to feed a real ETHERNET packet to it (in order to see if the crc check
>is exeuted correctly etc.). I will realy appreciate to get a complete
>ETHERNET packet (all bytes from PREAMBLE to FCS) so I could insert it
>to my modelsim simulation.
>
>the format I'm expecting is as follows..
>
>[55][55][55]... -> .. [FCS3][FCS2][FCS1][FCS0]
You could use a network sniffer to capture a packet from your LAN.
This will not capture the preamble and is unlikely to capture the CRC.
You may get lucky though.
I just checked with Ethereal ( http://www.ethereal.com/ ) and it
didn't capture the CRC on my hardware :(
Or, you could ask on news:comp.dcom.lans.ethernet, where this question
would be on-topic.
Regards,
Allan.
Reply by Moti Cohen●July 12, 20042004-07-12
Hy guys, I'm currently working on a 10/100 ETHERNET mac implementation
in an FPGA (using vhdl). in order to simulate my state machine I need
to feed a real ETHERNET packet to it (in order to see if the crc check
is exeuted correctly etc.). I will realy appreciate to get a complete
ETHERNET packet (all bytes from PREAMBLE to FCS) so I could insert it
to my modelsim simulation.
the format I'm expecting is as follows..
[55][55][55]... -> .. [FCS3][FCS2][FCS1][FCS0]