Hardware based IP protection of FPGA designs

Started by gnua...@gmail.com in comp.arch.fpga12 hours ago 1 reply

My customer is asking for a redesign of a very profitable board to deal with components that are EOL. Because of delivery issues from the EOL...

My customer is asking for a redesign of a very profitable board to deal with components that are EOL. Because of delivery issues from the EOL components, they are asking for the IP and manufacturing rights if I can't build them adequately. This seems a bit egregious, but I'm willing to do it if I can protect my financial interests. The ideal solution would be a device of some


Magellan VHDL monitor for Basys 3 board

Started by Claudio Avi Chami in comp.arch.fpga14 hours ago

Magellan HW monitor for Basys 3 board - Access register banks for reading/writing via JTAG to AXI adapter. Can also monitor register values via...

Magellan HW monitor for Basys 3 board - Access register banks for reading/writing via JTAG to AXI adapter. Can also monitor register values via the board seven-segment display (register address is selected through SW0-3) https://fpgaer.tech/?p=465


Last CFP: 22nd International Conference on Hybrid Intelligent Systems (HIS'22) - Online - Springer Publication

Started by Anu Bajaj in comp.arch.fpga2 weeks ago

* Final Call for Papers - please circulate this CFP to your colleagues and networks ** We are sending you an invitation for the 22nd...

* Final Call for Papers - please circulate this CFP to your colleagues and networks ** We are sending you an invitation for the 22nd International Conference on Hybrid Intelligent Systems (HIS'22) held during December 13-15, 2022. We are looking forward to receiving your research papers and seeing you online during ISDA 2022. A detailed call for papers is given below. We hope you wi


All my PDF files suddenly become Chrome HTML Document! Why?

Started by Tianxiang Weng in comp.arch.fpga1 month ago 17 replies

Hi, Overnight all my PDF files suddenly become Chrome HTML Document! Why? Are there some new things happening with Adobe policy on their free...

Hi, Overnight all my PDF files suddenly become Chrome HTML Document! Why? Are there some new things happening with Adobe policy on their free Read DC software yesterday? Thank you. Weng


Wide frequency range, arbitrary waveform DDS

Started by Stef in comp.arch.fpga1 month ago 22 replies

To generate frequencies from approximately 0.5 mHz to 12 MHz with a DDS a minimum clock of > 24, say 25 MHz, is required. To be able to go...

To generate frequencies from approximately 0.5 mHz to 12 MHz with a DDS a minimum clock of > 24, say 25 MHz, is required. To be able to go down to 0.5 mHz, a phase accumulator of at least 36 bits is required. This will give sub mHz resolution over the entire range. Nice for the low frequencies, but not of much use for MHz frequencies (in this application). Is there any objection to using a


Efinix FPGA

Started by gnua...@gmail.com in comp.arch.fpga1 month ago 17 replies

Anyone using Efinix parts? They look ok, even if they don't have a lot of package offerings. The smallest part has a 0.5A surge at power on. ...

Anyone using Efinix parts? They look ok, even if they don't have a lot of package offerings. The smallest part has a 0.5A surge at power on. The list it as "minimum", I'm guessing they mean the minimum required by the supply. They also don't provide software until you buy an eval board, so no way to check that out, up front. Funny company, but not as "funny" as Cologne Chip. They ...


2nd CFP: 18th International Conference on Information Assurance and Security (IAS 2022) - Online - Springer Publication

Started by Dr.Aswathy SU in comp.arch.fpga2 months ago

** Second Call for Papers - please circulate this CFP to your colleagues and networks ** -- 18th International Conference on Information...

** Second Call for Papers - please circulate this CFP to your colleagues and networks ** -- 18th International Conference on Information Assurance and Security (IAS 2022) -- http://www.mirlabs.org/ias22 http://www.mirlabs.net/ias22 On the World Wide Web December 13-15,2022 ** Plenary Speakers ** ------------------------------ Catarina Silva, University of Coimbra, Por


VHDL project. Connecting components to one component

Started by Durko Rurko in comp.arch.fpga2 months ago 1 reply

Hello guys, I am student at high school interested in VHDL programming and = post quantum algorithms. I have a code where algorithm is divided to...

Hello guys, I am student at high school interested in VHDL programming and = post quantum algorithms. I have a code where algorithm is divided to three = parts. Each part is a component. I would like to create another component, = which will put input to one of those three components, this component will = create output, this will be input to the third component and this one will = create fin...


Getting Rank of Elements in an Array using VHDL

Started by Md Multan Biswas in comp.arch.fpga3 months ago 1 reply

Dear VHDL Coders, I am trying to get the rank of elements from an array of data. For example, I have an array, Voltage = [20 40 10 30] ; The...

Dear VHDL Coders, I am trying to get the rank of elements from an array of data. For example, I have an array, Voltage = [20 40 10 30] ; The position of the elements in the voltage array is ranged from 0 to 3. Using a bubble sorting algorithm, I obtained the position index of the elements in the array as follows: Index (0)= 2 ; Index (1)= 0 ; Index (2)= 3 ; Index (3)= 1 ; However, ba...


Why Xilinx Ten Gigabit Ethernet PCS/PMA IP Core 32-bit version use less resources than 64-bit version?

Started by Qiu Shui in comp.arch.fpga5 months ago 1 reply

The 32-bit version should have better latency performance but I think it's more complex, so it should use more resources. But as the link...

The 32-bit version should have better latency performance but I think it's more complex, so it should use more resources. But as the link below https://www.xilinx.com/html_docs/ip_docs/pru_files/ten-gig-eth-pcs-pma.html 32-bit version is better in all kinds of aspects of resource utilization. If the 32-bit version has better latency, needs less resource. What's its cost to get these ...


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