Den søndag den 28. august 2016 kl. 08.09.26 UTC+2 skrev rickman:
>
> As you may have figured out, I'm not a big fan of Xilinx. I keep
> hearing about all manner of issues with their in house tool, Vivaldo.
> It used to be XST, but the scrapped that. In fact, my very first FPGA
> design was a Xilinx and during a four month project (or maybe six, I
> don't recall exactly) I had to ditch tools twice. The first time was to
> drop the Orcad VHDL tool as it was largely non-functional, switching to
> the Xilinx tool. Then a second time when Xilinx dropped their earlier
> tool and only supported a new one. Later they came out with XST and now
> Vivaldo. I don't get that they have to keep tossing tools. It makes it
> hard to maintain lifetime support for your product.
>
> On the other hand Lattice ditched the chip I have designed on a board I
> am still making good money from, *very* good money. Fortunately there
> is sufficient inventory that I won't have to redesign the board for a
> number of years. At least they use third party synthesis so it isn't a
> problem to keep supporting products over their lifetime.
>
if you had any current experience you would know that the name is Vivado
and that Xilinx have all versions of design tools going back something like
15 years still available
-Lasse
Reply by PM X●September 19, 20162016-09-19
On Saturday, September 3, 2016 at 8:37:44 AM UTC-7, Michael Kellett wrote:
> PM X:
> > On Monday, August 29, 2016 at 11:38:27 AM UTC-7, Cecil Bayona wrote:
> >> On 8/29/2016 1:32 PM, rickman wrote:
> >> > On 8/29/2016 4:58 AM, PM X wrote:
> >> >>>
> >> >>> UDP/IP is much simpler the TCP/IP. It is commonly done in FPGAs.
> >> >>>
> >> >>> For example:
> >> >>>
> >> >>> http://www.fpga4fun.com/10BASE-T.html
> >> >>>
> >> >>> OK. It is only 10Base-T. But it's not that different than the
> 10GbE that
> >> >>> we do.
> >> >>>
> >> >>> You can get a crappy NIC and Basys 3 Artix 7 board for less than
> $200.00
> >> >>>
> >> >>>
> http://store.digilentinc.com/pmodnic100-network-interface-controller/
> >> >>>
> >> >>> It won't be low latency (the NIC has an SPI serial interface) but
> it
> >> >>> will teach concepts.
> >> >>>
> >> >>> Rob.
> >> >>
> >> >> Thanks. Is this the board you are referring to?
> >> >>
> http://store.digilentinc.com/basys-3-artix-7-fpga-trainer-board-recommended-for-introductory-users/
> >> >>
> >> >>
> >> >> If so, this board doesn't seem to have SPI (at least no listed in
> the
> >> >> description). Also, do you think this board has enough capacity
> (in
> >> >> terms of logic elements, etc.) to support a fairly complicated
> design
> >> >> like UDP/IP?
> >> >
> >> > What do you mean it doesn't have SPI? SPI is a simple shift
> register
> >> > interface which can *easily* be implemented in an FPGA (or MCU)
> using
> >> > the GPIOs.
> >> >
> >> > Do you mean ISP, in system programming? If it doesn't have ISP how
> do
> >> > you load your design?
> >> >
> >>
> >> It's a FPGA, you can add SPI easily, there are IPs for free to allow
> >> that to happen.
> >>
> >> In my post I was also going to mention the BASYS-3 board, I left it
> out
> >> because the Arty Board has a ton of memory available that this one
> >> doesn't but this on has a lot of switches and LED which can be
> handy.
> >> --
> >> Cecil - k5nwa
> >
> > OK, thanks. I will check out both of them. What is the largest design
> you (or someone you know) have implemented on these boards? The Artix
> line seems to be lower end than Virtex line, so trying to get an idea if
> they can support somewhat complicated designs.
>
> I haven't used the Arty except on a 1 day Xilinx "get to know Vivado"
> jolly. It's quite anice board. We are looking at alternatives to Lattice
> (no big reason, just due diligence) with a design currently running on a
> Lattice ECP3-35. The FPGA on the Arty could easily do Ethernet trispeed
> MAC, IP, ARP, UDP and some more. (We do this on the Lattice (about 20%
> of it) so I know of what I speak (at least that far)) TCP on the FPGA
> would be bigger (could be much bigger).
>
> As an aside - why does HF trading use TCP - (think of this as an
> interview question :-)
>
> Our UDP support is good at transmitting, poor at receiving ('coz that's
> what we need) - it does support an in-house protocol for re-transmission
> and message integrity - much simpler than TCP and faster.
>
> By the time you've outgrown the Arty you've either done the career shift
> or it isn't going happen.
>
> Michael Kellett
Since many people have suggested Arty, I was giving it a serious thought. But although it does have ethernet (which I need), it does not have any kind of video output like VGA (I would strongly prefer to get a board with some kind of video output as well besides ethernet). I do not want to try and add VGA to it as I have no experience with that stuff. Another Digilent board that I really liked is the Nexys 4 DDR, which has both ethernet and VGA. But the price is a little over my budget at $320. I am trying to do this within $200, although I it can go up a bit (to maybe $300) if I don't find any good option in the "< $200" range.
To re-iterate, I am looking for a board with a Xilinx FPGA (preferably Artix-7) that uses the Vivado software. And as stated above, I want ethernet and video output connectivity support. So now that I have a clearer idea than before, if somebody can suggest a board meeting the above requirements (in the $200 range), that will be great.
So far I had only been looking at boards from Digilent, but I just came across another company called Avnet which also sells Xilinx boards. They seem to have a lot more choices when I search for a board with Artix-7 (while Digilent has only 3 or 4). I didn't understand very clearly what type of boards they sell. Do they make them or do they just distribute the boards made by Xilinx? Which one would be a better option - Digilent or Avnet? Or something else?
Thanks.
Reply by PM X●September 19, 20162016-09-19
On Saturday, September 3, 2016 at 8:37:44 AM UTC-7, Michael Kellett wrote:
> PM X:
> > On Monday, August 29, 2016 at 11:38:27 AM UTC-7, Cecil Bayona wrote:
> >> On 8/29/2016 1:32 PM, rickman wrote:
> >> > On 8/29/2016 4:58 AM, PM X wrote:
> >> >>>
> >> >>> UDP/IP is much simpler the TCP/IP. It is commonly done in FPGAs.
> >> >>>
> >> >>> For example:
> >> >>>
> >> >>> http://www.fpga4fun.com/10BASE-T.html
> >> >>>
> >> >>> OK. It is only 10Base-T. But it's not that different than the
> 10GbE that
> >> >>> we do.
> >> >>>
> >> >>> You can get a crappy NIC and Basys 3 Artix 7 board for less than
> $200.00
> >> >>>
> >> >>>
> http://store.digilentinc.com/pmodnic100-network-interface-controller/
> >> >>>
> >> >>> It won't be low latency (the NIC has an SPI serial interface) but
> it
> >> >>> will teach concepts.
> >> >>>
> >> >>> Rob.
> >> >>
> >> >> Thanks. Is this the board you are referring to?
> >> >>
> http://store.digilentinc.com/basys-3-artix-7-fpga-trainer-board-recommended-for-introductory-users/
> >> >>
> >> >>
> >> >> If so, this board doesn't seem to have SPI (at least no listed in
> the
> >> >> description). Also, do you think this board has enough capacity
> (in
> >> >> terms of logic elements, etc.) to support a fairly complicated
> design
> >> >> like UDP/IP?
> >> >
> >> > What do you mean it doesn't have SPI? SPI is a simple shift
> register
> >> > interface which can *easily* be implemented in an FPGA (or MCU)
> using
> >> > the GPIOs.
> >> >
> >> > Do you mean ISP, in system programming? If it doesn't have ISP how
> do
> >> > you load your design?
> >> >
> >>
> >> It's a FPGA, you can add SPI easily, there are IPs for free to allow
> >> that to happen.
> >>
> >> In my post I was also going to mention the BASYS-3 board, I left it
> out
> >> because the Arty Board has a ton of memory available that this one
> >> doesn't but this on has a lot of switches and LED which can be
> handy.
> >> --
> >> Cecil - k5nwa
> >
> > OK, thanks. I will check out both of them. What is the largest design
> you (or someone you know) have implemented on these boards? The Artix
> line seems to be lower end than Virtex line, so trying to get an idea if
> they can support somewhat complicated designs.
>
> I haven't used the Arty except on a 1 day Xilinx "get to know Vivado"
> jolly. It's quite anice board. We are looking at alternatives to Lattice
> (no big reason, just due diligence) with a design currently running on a
> Lattice ECP3-35. The FPGA on the Arty could easily do Ethernet trispeed
> MAC, IP, ARP, UDP and some more. (We do this on the Lattice (about 20%
> of it) so I know of what I speak (at least that far)) TCP on the FPGA
> would be bigger (could be much bigger).
>
> As an aside - why does HF trading use TCP - (think of this as an
> interview question :-)
>
> Our UDP support is good at transmitting, poor at receiving ('coz that's
> what we need) - it does support an in-house protocol for re-transmission
> and message integrity - much simpler than TCP and faster.
>
> By the time you've outgrown the Arty you've either done the career shift
> or it isn't going happen.
>
> Michael Kellett
Since many people have suggested Arty, I was giving it a serious thought. But although it does have ethernet (which I need), it does not have any kind of video output like VGA (I would strongly prefer to get a board with some kind of video output as well besides ethernet). I do not want to try and add VGA to it as I have no experience with that stuff. Another Digilent board that I really liked is the Nexys 4 DDR, which has both ethernet and VGA. But the price is a little over my budget at $320. I am trying to do this within $200, although I it can go up a bit (to maybe $300) if I don't find any good option in the "< $200" range.
To re-iterate, I am looking for a board with a Xilinx FPGA (preferably Artix-7) that uses the Vivado software. And as stated above, I want ethernet and video output connectivity support. So now that I have a clearer idea than before, if somebody can suggest a board meeting the above requirements (in the $200 range), that will be great.
So far I had only been looking at boards from Digilent, but I just came across another company called Avnet which also sells Xilinx boards. They seem to have a lot more choices when I search for a board with Artix-7 (while Digilent has only 3 or 4). I didn't understand very clearly what type of boards they sell. Do they make them or do they just distribute the boards made by Xilinx? Which one would be a better option - Digilent or Avnet? Or something else?
Thanks.
Reply by Michael Kellett●September 3, 20162016-09-03
PM X:
> On Monday, August 29, 2016 at 11:38:27 AM UTC-7, Cecil Bayona wrote:
>> On 8/29/2016 1:32 PM, rickman wrote:
>> > On 8/29/2016 4:58 AM, PM X wrote:
>> >>>
>> >>> UDP/IP is much simpler the TCP/IP. It is commonly done in FPGAs.
>> >>>
>> >>> For example:
>> >>>
>> >>> http://www.fpga4fun.com/10BASE-T.html
>> >>>
>> >>> OK. It is only 10Base-T. But it's not that different than the
10GbE that
>> >>> we do.
>> >>>
>> >>> You can get a crappy NIC and Basys 3 Artix 7 board for less than
>> >>
>> >>
>> >> If so, this board doesn't seem to have SPI (at least no listed in
the
>> >> description). Also, do you think this board has enough capacity
(in
>> >> terms of logic elements, etc.) to support a fairly complicated
design
>> >> like UDP/IP?
>> >
>> > What do you mean it doesn't have SPI? SPI is a simple shift
register
>> > interface which can *easily* be implemented in an FPGA (or MCU)
using
>> > the GPIOs.
>> >
>> > Do you mean ISP, in system programming? If it doesn't have ISP how
do
>> > you load your design?
>> >
>>
>> It's a FPGA, you can add SPI easily, there are IPs for free to allow
>> that to happen.
>>
>> In my post I was also going to mention the BASYS-3 board, I left it
out
>> because the Arty Board has a ton of memory available that this one
>> doesn't but this on has a lot of switches and LED which can be
handy.
>> --
>> Cecil - k5nwa
>
> OK, thanks. I will check out both of them. What is the largest design
you (or someone you know) have implemented on these boards? The Artix
line seems to be lower end than Virtex line, so trying to get an idea if
they can support somewhat complicated designs.
I haven't used the Arty except on a 1 day Xilinx "get to know Vivado"
jolly. It's quite anice board. We are looking at alternatives to Lattice
(no big reason, just due diligence) with a design currently running on a
Lattice ECP3-35. The FPGA on the Arty could easily do Ethernet trispeed
MAC, IP, ARP, UDP and some more. (We do this on the Lattice (about 20%
of it) so I know of what I speak (at least that far)) TCP on the FPGA
would be bigger (could be much bigger).
As an aside - why does HF trading use TCP - (think of this as an
interview question :-)
Our UDP support is good at transmitting, poor at receiving ('coz that's
what we need) - it does support an in-house protocol for re-transmission
and message integrity - much simpler than TCP and faster.
By the time you've outgrown the Arty you've either done the career shift
or it isn't going happen.
Michael Kellett
Reply by rickman●August 29, 20162016-08-29
On 8/29/2016 4:30 PM, Cecil Bayona wrote:
>
>
> On 8/29/2016 2:40 PM, PM X wrote:
>> On Monday, August 29, 2016 at 11:38:27 AM UTC-7, Cecil Bayona wrote:
>>> On 8/29/2016 1:32 PM, rickman wrote:
>>>> On 8/29/2016 4:58 AM, PM X wrote:
>>>>>>
>>>>>> UDP/IP is much simpler the TCP/IP. It is commonly done in FPGAs.
>>>>>>
>>>>>> For example:
>>>>>>
>>>>>> http://www.fpga4fun.com/10BASE-T.html
>>>>>>
>>>>>> OK. It is only 10Base-T. But it's not that different than the
>>>>>> 10GbE that
>>>>>> we do.
>>>>>>
>>>>>> You can get a crappy NIC and Basys 3 Artix 7 board for less than
>>>>>> $200.00
>>>>>>
>>>>>> http://store.digilentinc.com/pmodnic100-network-interface-controller/
>>>>>>
>>>>>> It won't be low latency (the NIC has an SPI serial interface) but it
>>>>>> will teach concepts.
>>>>>>
>>>>>> Rob.
>>>>>
>>>>> Thanks. Is this the board you are referring to?
>>>>> http://store.digilentinc.com/basys-3-artix-7-fpga-trainer-board-recommended-for-introductory-users/
>>>>>
>>>>>
>>>>>
>>>>> If so, this board doesn't seem to have SPI (at least no listed in the
>>>>> description). Also, do you think this board has enough capacity (in
>>>>> terms of logic elements, etc.) to support a fairly complicated design
>>>>> like UDP/IP?
>>>>
>>>> What do you mean it doesn't have SPI? SPI is a simple shift register
>>>> interface which can *easily* be implemented in an FPGA (or MCU) using
>>>> the GPIOs.
>>>>
>>>> Do you mean ISP, in system programming? If it doesn't have ISP how do
>>>> you load your design?
>>>>
>>>
>>> It's a FPGA, you can add SPI easily, there are IPs for free to allow
>>> that to happen.
>>>
>>> In my post I was also going to mention the BASYS-3 board, I left it out
>>> because the Arty Board has a ton of memory available that this one
>>> doesn't but this on has a lot of switches and LED which can be handy.
>>> --
>>> Cecil - k5nwa
>>
>> OK, thanks. I will check out both of them. What is the largest design
>> you (or someone you know) have implemented on these boards? The Artix
>> line seems to be lower end than Virtex line, so trying to get an idea
>> if they can support somewhat complicated designs.
>>
> Nothing Fancy, that is why in my earlier post I mentioned that I don't
> have a lot of experience. I been working a 32 bit stack based CPU, but
> it's a work in progress, I'm still sorting it out, it taken less than
> 20% of the chip, but a stack CPU are rather simple compared to other
> CPU's, when finished it should be pretty nice, most instructions take
> one clock to execute, and it used packed instructions, 5 instructions to
> a word fetch. Originally it was on a Lattice Brevia2, I am now
> converting it to a Artix-7 board, but there is software involved too so
> it's going slow and I'm learning as I go.
Just a comment on your stack processor. I've done some design work with
stack processors and read about a lot of designs. In my humble opinion,
if you have multiple cycle instructions, you are doing it wrong. I
don't want to steal the thread. If you care to discuss this we can
start another thread.
--
Rick C
Reply by rickman●August 29, 20162016-08-29
On 8/29/2016 3:40 PM, PM X wrote:
> On Monday, August 29, 2016 at 11:38:27 AM UTC-7, Cecil Bayona wrote:
>> On 8/29/2016 1:32 PM, rickman wrote:
>>> On 8/29/2016 4:58 AM, PM X wrote:
>>>>>
>>>>> UDP/IP is much simpler the TCP/IP. It is commonly done in FPGAs.
>>>>>
>>>>> For example:
>>>>>
>>>>> http://www.fpga4fun.com/10BASE-T.html
>>>>>
>>>>> OK. It is only 10Base-T. But it's not that different than the 10GbE that
>>>>> we do.
>>>>>
>>>>> You can get a crappy NIC and Basys 3 Artix 7 board for less than $200.00
>>>>>
>>>>> http://store.digilentinc.com/pmodnic100-network-interface-controller/
>>>>>
>>>>> It won't be low latency (the NIC has an SPI serial interface) but it
>>>>> will teach concepts.
>>>>>
>>>>> Rob.
>>>>
>>>> Thanks. Is this the board you are referring to?
>>>> http://store.digilentinc.com/basys-3-artix-7-fpga-trainer-board-recommended-for-introductory-users/
>>>>
>>>>
>>>> If so, this board doesn't seem to have SPI (at least no listed in the
>>>> description). Also, do you think this board has enough capacity (in
>>>> terms of logic elements, etc.) to support a fairly complicated design
>>>> like UDP/IP?
>>>
>>> What do you mean it doesn't have SPI? SPI is a simple shift register
>>> interface which can *easily* be implemented in an FPGA (or MCU) using
>>> the GPIOs.
>>>
>>> Do you mean ISP, in system programming? If it doesn't have ISP how do
>>> you load your design?
>>>
>>
>> It's a FPGA, you can add SPI easily, there are IPs for free to allow
>> that to happen.
>>
>> In my post I was also going to mention the BASYS-3 board, I left it out
>> because the Arty Board has a ton of memory available that this one
>> doesn't but this on has a lot of switches and LED which can be handy.
>> --
>> Cecil - k5nwa
>
> OK, thanks. I will check out both of them. What is the largest design you (or someone you know) have implemented on these boards? The Artix line seems to be lower end than Virtex line, so trying to get an idea if they can support somewhat complicated designs.
No sure what "lower end" means in technical terms. I expect the Artix
line of FPGAs will easily support somewhat complicated designs for
reasonable values of "somewhat complicated".
I suggest you not give much credence to marketing information and
consider the chip specifications. For the most part the important issue
is the LUT count. Otherwise the extra features are only useful if you
need them.
--
Rick C
Reply by Cecil Bayona●August 29, 20162016-08-29
On 8/29/2016 2:40 PM, PM X wrote:
> On Monday, August 29, 2016 at 11:38:27 AM UTC-7, Cecil Bayona wrote:
>> On 8/29/2016 1:32 PM, rickman wrote:
>>> On 8/29/2016 4:58 AM, PM X wrote:
>>>>>
>>>>> UDP/IP is much simpler the TCP/IP. It is commonly done in FPGAs.
>>>>>
>>>>> For example:
>>>>>
>>>>> http://www.fpga4fun.com/10BASE-T.html
>>>>>
>>>>> OK. It is only 10Base-T. But it's not that different than the 10GbE that
>>>>> we do.
>>>>>
>>>>> You can get a crappy NIC and Basys 3 Artix 7 board for less than $200.00
>>>>>
>>>>> http://store.digilentinc.com/pmodnic100-network-interface-controller/
>>>>>
>>>>> It won't be low latency (the NIC has an SPI serial interface) but it
>>>>> will teach concepts.
>>>>>
>>>>> Rob.
>>>>
>>>> Thanks. Is this the board you are referring to?
>>>> http://store.digilentinc.com/basys-3-artix-7-fpga-trainer-board-recommended-for-introductory-users/
>>>>
>>>>
>>>> If so, this board doesn't seem to have SPI (at least no listed in the
>>>> description). Also, do you think this board has enough capacity (in
>>>> terms of logic elements, etc.) to support a fairly complicated design
>>>> like UDP/IP?
>>>
>>> What do you mean it doesn't have SPI? SPI is a simple shift register
>>> interface which can *easily* be implemented in an FPGA (or MCU) using
>>> the GPIOs.
>>>
>>> Do you mean ISP, in system programming? If it doesn't have ISP how do
>>> you load your design?
>>>
>>
>> It's a FPGA, you can add SPI easily, there are IPs for free to allow
>> that to happen.
>>
>> In my post I was also going to mention the BASYS-3 board, I left it out
>> because the Arty Board has a ton of memory available that this one
>> doesn't but this on has a lot of switches and LED which can be handy.
>> --
>> Cecil - k5nwa
>
> OK, thanks. I will check out both of them. What is the largest design you (or someone you know) have implemented on these boards? The Artix line seems to be lower end than Virtex line, so trying to get an idea if they can support somewhat complicated designs.
>
Nothing Fancy, that is why in my earlier post I mentioned that I don't
have a lot of experience. I been working a 32 bit stack based CPU, but
it's a work in progress, I'm still sorting it out, it taken less than
20% of the chip, but a stack CPU are rather simple compared to other
CPU's, when finished it should be pretty nice, most instructions take
one clock to execute, and it used packed instructions, 5 instructions to
a word fetch. Originally it was on a Lattice Brevia2, I am now
converting it to a Artix-7 board, but there is software involved too so
it's going slow and I'm learning as I go.
--
Cecil - k5nwa
Reply by PM X●August 29, 20162016-08-29
On Monday, August 29, 2016 at 11:38:27 AM UTC-7, Cecil Bayona wrote:
> On 8/29/2016 1:32 PM, rickman wrote:
> > On 8/29/2016 4:58 AM, PM X wrote:
> >>>
> >>> UDP/IP is much simpler the TCP/IP. It is commonly done in FPGAs.
> >>>
> >>> For example:
> >>>
> >>> http://www.fpga4fun.com/10BASE-T.html
> >>>
> >>> OK. It is only 10Base-T. But it's not that different than the 10GbE that
> >>> we do.
> >>>
> >>> You can get a crappy NIC and Basys 3 Artix 7 board for less than $200.00
> >>>
> >>> http://store.digilentinc.com/pmodnic100-network-interface-controller/
> >>>
> >>> It won't be low latency (the NIC has an SPI serial interface) but it
> >>> will teach concepts.
> >>>
> >>> Rob.
> >>
> >> Thanks. Is this the board you are referring to?
> >> http://store.digilentinc.com/basys-3-artix-7-fpga-trainer-board-recommended-for-introductory-users/
> >>
> >>
> >> If so, this board doesn't seem to have SPI (at least no listed in the
> >> description). Also, do you think this board has enough capacity (in
> >> terms of logic elements, etc.) to support a fairly complicated design
> >> like UDP/IP?
> >
> > What do you mean it doesn't have SPI? SPI is a simple shift register
> > interface which can *easily* be implemented in an FPGA (or MCU) using
> > the GPIOs.
> >
> > Do you mean ISP, in system programming? If it doesn't have ISP how do
> > you load your design?
> >
>
> It's a FPGA, you can add SPI easily, there are IPs for free to allow
> that to happen.
>
> In my post I was also going to mention the BASYS-3 board, I left it out
> because the Arty Board has a ton of memory available that this one
> doesn't but this on has a lot of switches and LED which can be handy.
> --
> Cecil - k5nwa
OK, thanks. I will check out both of them. What is the largest design you (or someone you know) have implemented on these boards? The Artix line seems to be lower end than Virtex line, so trying to get an idea if they can support somewhat complicated designs.
Reply by PM X●August 29, 20162016-08-29
On Monday, August 29, 2016 at 11:32:23 AM UTC-7, rickman wrote:
> On 8/29/2016 4:58 AM, PM X wrote:
> >>
> >> UDP/IP is much simpler the TCP/IP. It is commonly done in FPGAs.
> >>
> >> For example:
> >>
> >> http://www.fpga4fun.com/10BASE-T.html
> >>
> >> OK. It is only 10Base-T. But it's not that different than the 10GbE that
> >> we do.
> >>
> >> You can get a crappy NIC and Basys 3 Artix 7 board for less than $200.00
> >>
> >> http://store.digilentinc.com/pmodnic100-network-interface-controller/
> >>
> >> It won't be low latency (the NIC has an SPI serial interface) but it
> >> will teach concepts.
> >>
> >> Rob.
> >
> > Thanks. Is this the board you are referring to?
> > http://store.digilentinc.com/basys-3-artix-7-fpga-trainer-board-recommended-for-introductory-users/
> >
> > If so, this board doesn't seem to have SPI (at least no listed in the description). Also, do you think this board has enough capacity (in terms of logic elements, etc.) to support a fairly complicated design like UDP/IP?
>
> What do you mean it doesn't have SPI? SPI is a simple shift register
> interface which can *easily* be implemented in an FPGA (or MCU) using
> the GPIOs.
>
> Do you mean ISP, in system programming? If it doesn't have ISP how do
> you load your design?
>
> --
>
> Rick C
I meant I didn't see a (dedicated) SPI interface. But you're right. SPI protocol just needs 4 general purpose pins, so using GPIOs should do it.
Reply by Cecil Bayona●August 29, 20162016-08-29
On 8/29/2016 1:32 PM, rickman wrote:
> On 8/29/2016 4:58 AM, PM X wrote:
>>>
>>> UDP/IP is much simpler the TCP/IP. It is commonly done in FPGAs.
>>>
>>> For example:
>>>
>>> http://www.fpga4fun.com/10BASE-T.html
>>>
>>> OK. It is only 10Base-T. But it's not that different than the 10GbE that
>>> we do.
>>>
>>> You can get a crappy NIC and Basys 3 Artix 7 board for less than $200.00
>>>
>>> http://store.digilentinc.com/pmodnic100-network-interface-controller/
>>>
>>> It won't be low latency (the NIC has an SPI serial interface) but it
>>> will teach concepts.
>>>
>>> Rob.
>>
>> Thanks. Is this the board you are referring to?
>> http://store.digilentinc.com/basys-3-artix-7-fpga-trainer-board-recommended-for-introductory-users/
>>
>>
>> If so, this board doesn't seem to have SPI (at least no listed in the
>> description). Also, do you think this board has enough capacity (in
>> terms of logic elements, etc.) to support a fairly complicated design
>> like UDP/IP?
>
> What do you mean it doesn't have SPI? SPI is a simple shift register
> interface which can *easily* be implemented in an FPGA (or MCU) using
> the GPIOs.
>
> Do you mean ISP, in system programming? If it doesn't have ISP how do
> you load your design?
>
It's a FPGA, you can add SPI easily, there are IPs for free to allow
that to happen.
In my post I was also going to mention the BASYS-3 board, I left it out
because the Arty Board has a ton of memory available that this one
doesn't but this on has a lot of switches and LED which can be handy.
--
Cecil - k5nwa