"Rene Tschaggelar" <none@none.net> wrote in message
news:417d4fca$0$28024$5402220f@news.sunrise.ch...
> Jock wrote:
>
> > Can a Cyclone PLL accept a clipped sine wave with an amplitude of 0.8V -
> > i.e. what is the maximum rise time on the edge of the PLL clock input?
>
> What is wrong with a line receiver to meet the AC voltage
> specifications ?
> The 1.5V-IO requires 0.35 and 0.65 times 1.5V as levels.
>
> Rene
> --
> Ing.Buero R.Tschaggelar - http://www.ibrtses.com
> & commercial newsgroups - http://www.talkto.net
We don't have a lot of real estate and I was looking at ways of reducing
component count.
Reply by Rene Tschaggelar●October 25, 20042004-10-25
Jock wrote:
> Can a Cyclone PLL accept a clipped sine wave with an amplitude of 0.8V -
> i.e. what is the maximum rise time on the edge of the PLL clock input?
What is wrong with a line receiver to meet the AC voltage
specifications ?
The 1.5V-IO requires 0.35 and 0.65 times 1.5V as levels.
Rene
--
Ing.Buero R.Tschaggelar - http://www.ibrtses.com
& commercial newsgroups - http://www.talkto.net
Reply by Jock●October 25, 20042004-10-25
Can a Cyclone PLL accept a clipped sine wave with an amplitude of 0.8V -
i.e. what is the maximum rise time on the edge of the PLL clock input?