Reply by Steven K. Knapp●September 16, 20032003-09-16
Like Virtex-II and Virtex-II Pro, the Spartan-3 FPGA pre-configuration
pull-up resistors are controlled by the HSWAP_EN pin.
0 = Enables weak pull-up resistors on all pins not actively involved in the
configuration process.
1 = No pull-up resistors during configuration.
After configuration, this pin is not used and should be kept at a logic 0 or
1.
See page 13 of the Spartan-3 data sheet (Module 4, Pinouts) for more
information.
http://direct.xilinx.com/bvdocs/publications/ds099-4.pdf
---------------------------------
Steven K. Knapp
Applications Manager, Xilinx Inc.
Spartan-3/II/IIE FPGAs
http://www.xilinx.com/spartan3
---------------------------------
Spartan-3: Make it Your ASIC
"Amontec Team" <laurent.gauch@www.DELALLCAPSamontec.com> wrote in message
news:3f65851f$1@news.vsnet.ch...
> Hi,
>
> For the Spartan-II, the preconfiguration pullup resistors were selected
> by the M2 configuration pin. What about for the Spartan-3?
>
> My new design has to connect an ARM7TDMI bus to the SPARTAN-3. I need to
> make sure my ucLinux will boot correctly, and so make sure about the IO
> pins states of the SPARTAN-3 on the poweron.
>
> Regards,
> Laurent
>
Reply by Amontec Team●September 15, 20032003-09-15
Hi,
For the Spartan-II, the preconfiguration pullup resistors were selected
by the M2 configuration pin. What about for the Spartan-3?
My new design has to connect an ARM7TDMI bus to the SPARTAN-3. I need to
make sure my ucLinux will boot correctly, and so make sure about the IO
pins states of the SPARTAN-3 on the poweron.
Regards,
Laurent