OK,

I've tried a simple project in Lattice ispLever software and it tells me the 
number of pin used, number of registers and the number of logic pterms.
Are the pterms equivalent to macrocell?

"General Schvantzkoph" <schvantzkoph@yahoo.com> schrieb im Newsbeitrag 
news:pan.2004.11.25.18.51.15.32873@yahoo.com...
> On Thu, 25 Nov 2004 13:05:14 +0100, Mouarf wrote:
>
>> hello all,
>>
>> For a hobbyist purpose, I want to drive an LCD display (320x240) with a 
>> CPLD
>> or FPGA in a standalone device (weather station). I've already played 
>> with
>> FPGA and VHDL for some projects but I was never involved in the hardware
>> part of such projects.
>>
>> The CPLD would have to read data (bitmap picture) from a dual port RAM 
>> and
>> write it to the 4 bit data input of the LCD controller (+control lines,
>> clock...). On the other side of the RAM, a microcontroller will update
>> sometimes the content of the picture to be displayed.
>>
>> I would like to know how to estimate the number of gate needed for the
>> project in order to buy the cheapest CPLD that fits the number of gate.
>>
>> Do I need first to design the VHDL part and synthetize to know the number 
>> of
>> gate and then choose the CPLD?
>>
>> I do not really understand the difference between CPLD and FPGA and what 
>> is
>> better for me.
>>
>> For a  CPLD, the configuration is non volatile and in the FPGA it is
>> volatile so a reconfiguration is needed on each start (via configuration
>> EEPROM or JTAG programming) but the FPGA is much more powerfull. Correct?
>>
>> Is a CPLD enough for my project? I'm turning around Xilinx XC9536 which
>> seems to be very often used nowadays, is it a good choice for this 
>> project?
>>
>>
>> Many thanks by advance.
>
> Since this a learning experience for you I'd suggest that you design,
> simulate and synthesize it before you attempt to build any hardware. The
> best way to get a feel for what a logic family is capable of is to try
> a number of designs. After a while you'll be able to look at a project and
> know what the right device is.
>

"newman5382" <newman5382@aol.com> wrote in message
news:R5lpd.68810$8G4.37498@tornado.tampabay.rr.com...
>
> "Mouarf" <mouarf@chezmoi.fr> wrote in message
> news:41a5ca7c$0$17590$636a15ce@news.free.fr...
> > hello all,
> >
> > For a hobbyist purpose, I want to drive an LCD display (320x240) with a
> > CPLD or FPGA in a standalone device (weather station). I've already
played
> > with FPGA and VHDL for some projects but I was never involved in the
> > hardware part of such projects.
> >
> > The CPLD would have to read data (bitmap picture) from a dual port RAM
and
> > write it to the 4 bit data input of the LCD controller (+control lines,
> > clock...). On the other side of the RAM, a microcontroller will update
> > sometimes the content of the picture to be displayed.
> >
> > I would like to know how to estimate the number of gate needed for the
> > project in order to buy the cheapest CPLD that fits the number of gate.
> >
> > Do I need first to design the VHDL part and synthetize to know the
number
> > of gate and then choose the CPLD?
>
> That is my preference.  IMHO, CPLD's can be a real pain if one
> underestimates the size and or fan-in. Also, the implementation is more
> sensitive to the pin out selected.
> As a point of reference (FPGA), a monochrome EL display (160x120) used
>
> 486/4992 (9%) LE  ACEX1K EP1K100FI256-2
> 40,960/49152 (83%) memory bits  (two frames in DP RAM)
>
> -- not a particularly good LE to DP RAM ratio.
>
> >
> > I do not really understand the difference between CPLD and FPGA and what
> > is better for me.
>
> Some CPLD's have really low power.  Most FPGA's have on board memory
> that can be conveniently utilized.  A uP with dual port ram, and logic
could
> be
> packaged in a single FPGA chip to drive the LCD display.   I've seen some
> FPGA
> evaluation boards that claim to do this.  The Xilinx website has some
boards
> and
> links to other vendors that sell this stuff.  You may be able to get some
> other
> data points from this in order to estimate the amount of logic needed.
>
> >
> > For a  CPLD, the configuration is non volatile and in the FPGA it is
> > volatile so a reconfiguration is needed on each start (via configuration
> > EEPROM or JTAG programming) but the FPGA is much more powerfull.
Correct?
>
> There was some talk about someone having an FPGA with configuration flash
on
> board the FPGA, but I can neither confirm nor deny this assertion.  An
FPGA
> can
> be configured from non-volatile storage via a uP too.

I believe Lattice does have non-volatile FPGAs.  I suspect they're a bit
pricey.
http://www.latticesemi.com/products/fpga/xpga/index.cfm

   Best wishes,
   --Phil Martel
>
> >
> > Is a CPLD enough for my project? I'm turning around Xilinx XC9536 which
> > seems to be very often used nowadays, is it a good choice for this
> > project?
> >
> I would estimate the amount of Dual Port RAM bits required to see if I
could
> get rid of the discrete dual port RAM by using resources in the FPGA.  If
a
> suitable
> FPGA can be found with a good DP RAM to LE ratio,  I would further
research
> the
> cost in an attempt to justify using an FPGA, which I think would be more
fun
> :,)
>
> -- Newman
>
> >
> > Many thanks by advance.
> >
> >
> >
>
>

On Thu, 25 Nov 2004 13:05:14 +0100, Mouarf wrote:

> hello all,
> 
> For a hobbyist purpose, I want to drive an LCD display (320x240) with a CPLD 
> or FPGA in a standalone device (weather station). I've already played with 
> FPGA and VHDL for some projects but I was never involved in the hardware 
> part of such projects.
> 
> The CPLD would have to read data (bitmap picture) from a dual port RAM and 
> write it to the 4 bit data input of the LCD controller (+control lines, 
> clock...). On the other side of the RAM, a microcontroller will update 
> sometimes the content of the picture to be displayed.
> 
> I would like to know how to estimate the number of gate needed for the 
> project in order to buy the cheapest CPLD that fits the number of gate.
> 
> Do I need first to design the VHDL part and synthetize to know the number of 
> gate and then choose the CPLD?
> 
> I do not really understand the difference between CPLD and FPGA and what is 
> better for me.
> 
> For a  CPLD, the configuration is non volatile and in the FPGA it is 
> volatile so a reconfiguration is needed on each start (via configuration 
> EEPROM or JTAG programming) but the FPGA is much more powerfull. Correct?
> 
> Is a CPLD enough for my project? I'm turning around Xilinx XC9536 which 
> seems to be very often used nowadays, is it a good choice for this project?
> 
> 
> Many thanks by advance.

Since this a learning experience for you I'd suggest that you design,
simulate and synthesize it before you attempt to build any hardware. The
best way to get a feel for what a logic family is capable of is to try
a number of designs. After a while you'll be able to look at a project and
know what the right device is.

It really depends heavily on your implementation and what you include in the
controller.  It can be really small if you are clever about how it is
implemented.  I've done LCD and CRT controllers in devices as small as the old
Xilinx 2064, which had only 64 CLBs, no carry chains and no internal memory
(used a static RAM outside the device).  If you want to support more complicated
features such as multi-display support, color, graphics support etc, it can
quickly run into a much much bigger device.  You needn't do the whole design
before estimating the gates, but you do have to go far enough that you have the
design partitioned into small enough blocks that you can count the registers and
fan in (through logic) to each register.  From there, you can get a fairly
accurate resource count.  Keep in mind that if your pixel rate is low enough,
you can take advantage of a higher than pixel rate clock by time sharing some of
the hardware to reduce the area.

Mouarf wrote:

> hello all,
>
> For a hobbyist purpose, I want to drive an LCD display (320x240) with a CPLD
> or FPGA in a standalone device (weather station). I've already played with
> FPGA and VHDL for some projects but I was never involved in the hardware
> part of such projects.
>
> The CPLD would have to read data (bitmap picture) from a dual port RAM and
> write it to the 4 bit data input of the LCD controller (+control lines,
> clock...). On the other side of the RAM, a microcontroller will update
> sometimes the content of the picture to be displayed.
>
> I would like to know how to estimate the number of gate needed for the
> project in order to buy the cheapest CPLD that fits the number of gate.
>
> Do I need first to design the VHDL part and synthetize to know the number of
> gate and then choose the CPLD?
>
> I do not really understand the difference between CPLD and FPGA and what is
> better for me.
>
> For a  CPLD, the configuration is non volatile and in the FPGA it is
> volatile so a reconfiguration is needed on each start (via configuration
> EEPROM or JTAG programming) but the FPGA is much more powerfull. Correct?
>
> Is a CPLD enough for my project? I'm turning around Xilinx XC9536 which
> seems to be very often used nowadays, is it a good choice for this project?
>
> Many thanks by advance.

--
--Ray Andraka, P.E.
President, the Andraka Consulting Group, Inc.
401/884-7930     Fax 401/884-7950
email ray@andraka.com
http://www.andraka.com

 "They that give up essential liberty to obtain a little
  temporary safety deserve neither liberty nor safety."
                                          -Benjamin Franklin, 1759

"Mouarf" <mouarf@chezmoi.fr> wrote in message 
news:41a5ca7c$0$17590$636a15ce@news.free.fr...
> hello all,
>
> For a hobbyist purpose, I want to drive an LCD display (320x240) with a 
> CPLD or FPGA in a standalone device (weather station). I've already played 
> with FPGA and VHDL for some projects but I was never involved in the 
> hardware part of such projects.
>
> The CPLD would have to read data (bitmap picture) from a dual port RAM and 
> write it to the 4 bit data input of the LCD controller (+control lines, 
> clock...). On the other side of the RAM, a microcontroller will update 
> sometimes the content of the picture to be displayed.
>
> I would like to know how to estimate the number of gate needed for the 
> project in order to buy the cheapest CPLD that fits the number of gate.
>
> Do I need first to design the VHDL part and synthetize to know the number 
> of gate and then choose the CPLD?

That is my preference.  IMHO, CPLD's can be a real pain if one 
underestimates the size and or fan-in. Also, the implementation is more 
sensitive to the pin out selected.
As a point of reference (FPGA), a monochrome EL display (160x120) used

486/4992 (9%) LE  ACEX1K EP1K100FI256-2
40,960/49152 (83%) memory bits  (two frames in DP RAM)

-- not a particularly good LE to DP RAM ratio.

>
> I do not really understand the difference between CPLD and FPGA and what 
> is better for me.

Some CPLD's have really low power.  Most FPGA's have on board memory
that can be conveniently utilized.  A uP with dual port ram, and logic could 
be
packaged in a single FPGA chip to drive the LCD display.   I've seen some 
FPGA
evaluation boards that claim to do this.  The Xilinx website has some boards 
and
links to other vendors that sell this stuff.  You may be able to get some 
other
data points from this in order to estimate the amount of logic needed.

>
> For a  CPLD, the configuration is non volatile and in the FPGA it is 
> volatile so a reconfiguration is needed on each start (via configuration 
> EEPROM or JTAG programming) but the FPGA is much more powerfull. Correct?

There was some talk about someone having an FPGA with configuration flash on
board the FPGA, but I can neither confirm nor deny this assertion.  An FPGA 
can
be configured from non-volatile storage via a uP too.

>
> Is a CPLD enough for my project? I'm turning around Xilinx XC9536 which 
> seems to be very often used nowadays, is it a good choice for this 
> project?
>
I would estimate the amount of Dual Port RAM bits required to see if I could
get rid of the discrete dual port RAM by using resources in the FPGA.  If a 
suitable
FPGA can be found with a good DP RAM to LE ratio,  I would further research 
the
cost in an attempt to justify using an FPGA, which I think would be more fun 
:,)

-- Newman

>
> Many thanks by advance.
>
>
>

hello all,

For a hobbyist purpose, I want to drive an LCD display (320x240) with a CPLD 
or FPGA in a standalone device (weather station). I've already played with 
FPGA and VHDL for some projects but I was never involved in the hardware 
part of such projects.

The CPLD would have to read data (bitmap picture) from a dual port RAM and 
write it to the 4 bit data input of the LCD controller (+control lines, 
clock...). On the other side of the RAM, a microcontroller will update 
sometimes the content of the picture to be displayed.

I would like to know how to estimate the number of gate needed for the 
project in order to buy the cheapest CPLD that fits the number of gate.

Do I need first to design the VHDL part and synthetize to know the number of 
gate and then choose the CPLD?

I do not really understand the difference between CPLD and FPGA and what is 
better for me.

For a  CPLD, the configuration is non volatile and in the FPGA it is 
volatile so a reconfiguration is needed on each start (via configuration 
EEPROM or JTAG programming) but the FPGA is much more powerfull. Correct?

Is a CPLD enough for my project? I'm turning around Xilinx XC9536 which 
seems to be very often used nowadays, is it a good choice for this project?


Many thanks by advance.