Kolja Sulimma wrote:
> Gabor wrote:
> > Kolja Sulimma wrote:
>  >>Now 0.5mm single in line resistor packs would be
> >>great (Pinout A1-A2-B1-B2-....). But dual in line resistor packs
are
> >>rather useless unless I can route a signal between the pins.
> >
> > Check out Bourns CAT16-PT4F4 or CAT16-PT2F2.  These are 0.8mm, not
0.5
> > but they route through nicely on the surface (they're DIP but work
like
> > a SIP because opposite pads connect together).
>
> You are aware that I need to do parallel termination, not series
> termination? I use these resistor arrays a lot, but as you can not
route
>   between the pins they are really inconvenient for LVDS parallel
> termination.
>

Look at the data sheet.  The connection looks like:

1 --------------- 8
         |
         R
         E
         S
         |
2 --------------- 7

and so on, where all RES are 100 ohms.  It is really made for this type
of termination.  The only thing you would like is finer pitch.

> But we are really OT for this group now. Is there a sci.pcb.layout
> newgroup or something?
> ;-)
> 
> Kolja

Kolja Sulimma <news@sulimma.de> wrote:
> Gabor wrote:
> > Kolja Sulimma wrote:
>  >>Now 0.5mm single in line resistor packs would be
> >>great (Pinout A1-A2-B1-B2-....). But dual in line resistor packs are
> >>rather useless unless I can route a signal between the pins.
> > 
> > Check out Bourns CAT16-PT4F4 or CAT16-PT2F2.  These are 0.8mm, not 0.5
> > but they route through nicely on the surface (they're DIP but work like
> > a SIP because opposite pads connect together).

> You are aware that I need to do parallel termination, not series 
> termination? I use these resistor arrays a lot, but as you can not route 
>   between the pins they are really inconvenient for LVDS parallel 
> termination.

> But we are really OT for this group now. Is there a sci.pcb.layout 
> newgroup or something?
> ;-)

Have a look at digikey. They have a lot of special footprints, e.g. 
RT1710B6P.

Hope this helps
-- 
Uwe Bonnes                bon@elektron.ikp.physik.tu-darmstadt.de

Institut fuer Kernphysik  Schlossgartenstrasse 9  64289 Darmstadt
--------- Tel. 06151 162516 -------- Fax. 06151 164321 ----------

Gabor wrote:
> Kolja Sulimma wrote:
 >>Now 0.5mm single in line resistor packs would be
>>great (Pinout A1-A2-B1-B2-....). But dual in line resistor packs are
>>rather useless unless I can route a signal between the pins.
> 
> Check out Bourns CAT16-PT4F4 or CAT16-PT2F2.  These are 0.8mm, not 0.5
> but they route through nicely on the surface (they're DIP but work like
> a SIP because opposite pads connect together).

You are aware that I need to do parallel termination, not series 
termination? I use these resistor arrays a lot, but as you can not route 
  between the pins they are really inconvenient for LVDS parallel 
termination.

But we are really OT for this group now. Is there a sci.pcb.layout 
newgroup or something?
;-)

Kolja

Kolja Sulimma wrote:
> Symon wrote:
> > p.s.
> > Hey Kolja, did you look at those resistor packs?
> Yes I did. I used them in previous projects. The problem with this
one
> are the vias.
> I can run differential pairs nicely pitch matched from the 0.5mm
pitch
> pqfp to the 1mm bga. Now 0.5mm single in line resistor packs would be

> graet (Pinout A1-A2-B1-B2-....). But dual in line resistor packs are
> rather useless unless I can route a signal between the pins.
>
> I can't meet a 0.5mm via pitch, so the resistors can not sit at the
back
> . And I can not have the vias on the inside of the PQFP (at least not

> all of them) because it is almost completely filled with a thermal
pad.
>
Check out Bourns CAT16-PT4F4 or CAT16-PT2F2.  These are 0.8mm, not 0.5
but they route through nicely on the surface (they're DIP but work like
a SIP because opposite pads connect together).

> But I am going to find a way to squeeze in the resistors....
> 
> Kolja

Symon wrote:
> p.s.
> Hey Kolja, did you look at those resistor packs?
Yes I did. I used them in previous projects. The problem with this one 
are the vias.
I can run differential pairs nicely pitch matched from the 0.5mm pitch 
pqfp to the 1mm bga. Now 0.5mm single in line resistor packs would be 
graet (Pinout A1-A2-B1-B2-....). But dual in line resistor packs are 
rather useless unless I can route a signal between the pins.

I can't meet a 0.5mm via pitch, so the resistors can not sit at the back 
. And I can not have the vias on the inside of the PQFP (at least not 
all of them) because it is almost completely filled with a thermal pad.

But I am going to find a way to squeeze in the resistors....

Kolja

Thanks to all of you for your replies. I am going to squeeze in the 
resistors somehow (the problem is to fit all the vias).

Kolja Sulimma

Jim Granville wrote
>  On a short run, just where the termination is, is not as critical as 
> having the temination itself.
[...]
> you can get 4 resistors in a single package, and mount them 
> routing-practical distances from the receiver ?
> 
> -jg
> 

Symon wrote:
>
> Just to clarify, I'm not saying a split plane won't work. I'm saying
> that with proper bypassing/decoupling it won't work any better than a
> single plane.
>
I didn't intend to wholeheartedly endorse splitting up the ground
plane, but only to question how Kolja was planning to lay out the
board, and suggest that appropriate care and attention be paid if
attempting such a crossing with the LVDS pairs in question.

Brian

"Symon" <symon_brewer@hotmail.com> wrote in message
news:36cireF4vupthU1@individual.net...
> Ah well, here I go. This may generate some traffic.
> Don't split the ground plane. Ever. It's your reference.
Just to clarify, I'm not saying a split plane won't work. I'm saying that
with proper bypassing/decoupling it won't work any better than a single
plane.
Cheers, Syms.

Hi Brian,
Comments below.

"Brian Davis" <brimdavis@aol.com> wrote in message
news:1107316023.395368.177070@c13g2000cwb.googlegroups.com...
> Kolja wrote:
>
> Also, if the A/D is only 4 mm distant from the FPGA, I'd start
> worrying about power/gnd plane noise & bypass problems, and then
> start considering moving it farther away :)
>
> Or, are you splitting A/D and FPGA ground & power to provide
> supply isolation, and then running coupled pairs across the
> plane cuts to the FPGA?
>
Ah well, here I go. This may generate some traffic.
Don't split the ground plane. Ever. It's your reference. I hear all this
stuff about currents flowing through the plane giving voltage noise. Doesn't
matter, with _proper_ bypassing, everything is coupled to the ground plane
so it all goes up and down locally with the plane anyway. Separate power is
of course a good idea, and in fact probably necessary. Each power area is
isolated from other power areas but tightly coupled to the ground plane
locally. As for your digital signals, keep them close to the ground plane
all the way to their destination.
Occasionally you'll see an app note from a ADC vendor saying you can use a
split plane, but all their sample/demo boards always have a single non-split
plane. I've come to think this is because they want to keep die-hard
plane-splitters using their parts. I guess these customers make a LOT of
prototypes!
Cheers, Syms.
p.s.
Hey Kolja, did you look at those resistor packs?

Kolja Sulimma wrote:
> Austin Lesea wrote at 2003-10-02 08:03:57 PST
> "Also look at what happens when you do not have a 100 ohm termination. 
> For some signals, and lengths of pcb, it may not be required." and
> "If I may suggest, use LVDCI_25_DCI only for clock inputs, or a few
> signals."
> 
> I need to get 16 LVDS pairs into one edge of a Spartan-3. This is really 
>  simple to layout without termination resistors and really complicated 
> (with our board technology) if I add termination resistors.
> 
> Without termination the maximum signal length is 4mm. The chip driving 
> the LVDS signals uses current mode output drivers.
> 
> My question now is what will happen if I try to use LVDS without 
> termination? Will the current mode drivers produce a very large output 
> signal swing? dangerous overshoot? (They are 3.3V powered)
> We want to run data at 480 Mbps over each pair so surely reflections 
> with less than 30ps roundtrip time are not that much of a problem?
> 
> If the current mode drivers require the 100R at their output, could I 
> add them at the source? To get many resistors much closer than 4mm on a 
> bga is difficult anyway.
> 
> Thank you in advance for your suggestions.

  On a short run, just where the termination is, is not as critical as 
having the temination itself.

  Fish-hooks in no termination at all, are likely to be :
a) Common mode range of the LVDS receivers - I do not believe this
is Rail-rail comparitor stuff - outside the common mode range two things 
might happen - slower recovery and/or logic inversion.
  Someone at xilinx should know ?

b) Simple dV/dT effects, will mean more intersymbol distortion effects
[assuming a) does not bite you first :) ]

you can get 4 resistors in a single package, and mount them 
routing-practical distances from the receiver ?

-jg