Philipp <sportfreund@gmx.at> wrote:
> is this okay when I leave it this waz and let the synthese tool 
> do the work to get rid of the redundant information?

	yes, that's ok. But keep care about other warnings. One 
drawback of XST is the generation of warnings: if your project 
grow it is near to impossible to avoid warnings. Some of them
are harmless and more "informative". But other could be 
essential and it is possible that you overlook some.

WD
-- 

Thanks Paul, is this okay when I leave it this waz and let the synthese tool 
do the work to get rid of the redundant information?

cheers
Philipp


"Paul Leventis (at home)" <paulleventis-news@yahoo.ca> wrote in message 
news:Tf6dnecnorC8wJvfRVn-jA@rogers.com...
> outp and accu have many bits which will always have the same value.  The 
> synthesis tool notices this, and thus decides to reusue the accu register 
> to feed whatever the corresponding bits of the outp register feed.
>
> For example, outp(0) is always accu(0).  So is accu1(8).  So using 
> accu1(8) everywhere that outp(0) is used is logically equivalent, and uses 
> fewer resources.

outp and accu have many bits which will always have the same value.  The 
synthesis tool notices this, and thus decides to reusue the accu register to 
feed whatever the corresponding bits of the outp register feed.

For example, outp(0) is always accu(0).  So is accu1(8).  So using accu1(8) 
everywhere that outp(0) is used is logically equivalent, and uses fewer 
resources.

- Paul

"Philipp" <sportfreund@gmx.at> wrote in message 
news:36n438F50qb8bU1@individual.net...
> Hello
>
> I have implemented an multiplier in the following way: I always take 4 
> bits of my first operand and multiply it with the second operand. So in 
> every step I generate 4 partial products which have to be added. This sum 
> is stored in the accumulator. In the next clock cycle I take the next 4 
> bits, multiply it with the second operand, sum up the partial products and 
> add this to my accumulator. This is performed a few times until I have 
> processed all the bits of operand one. Then my result is stored in the 
> accu.
> My implementation works fine but when I synthesize it I get a lot of 
> "warnings", can somebody tell me what went wrong here?
>
> Mapping all equations...
> Building and optimizing final netlist ...
> Register outp_0 equivalent to accu1_8 has been removed
> Register outp_1 equivalent to accu1_9 has been removed
> Register outp_2 equivalent to accu1_10 has been removed
> Register outp_3 equivalent to accu1_11 has been removed
> Register outp_4 equivalent to accu1_12 has been removed
> Register outp_5 equivalent to accu1_13 has been removed
> Register outp_6 equivalent to accu1_14 has been removed
> Register outp_7 equivalent to accu1_15 has been removed
> Register outp_8 equivalent to accu1_16 has been removed
> Register outp_9 equivalent to accu1_17 has been removed
> and so on...
>
> The code for accu1 and outp looks the following:
>
> if rst = '1' then
>     op1 <= (others => '0');
>     op2 <= (others => '0');
>     outp <= (others => '0');
>     accu1 <= (others => '0');
>
>  elsif clk'event and clk = '1' then
>       if load = '1' then
>          op1 <= inp0;
>          op2 <= inp1;
>       end if;
>       if shift = '1' then
>          op2 <= op2((2*width-10 downto 0) & (7 downto 0 => '0');
>       end if;
>       if acc = '1' then
>          accu1 <= accu((2*width-1) downto 0) & (7 downto 0 => '0');
>          outp<= "00" & accu((2*width-3) downto 0);
>       end if;
>  end if;
>  end process;
>
> accu represents always the newest Accumulator value. Hope somebody can 
> explain me how to get rid of all these warnings
>
> Cheers
> Philipp
> 

Hello

I have implemented an multiplier in the following way: I always take 4 bits 
of my first operand and multiply it with the second operand. So in every 
step I generate 4 partial products which have to be added. This sum is 
stored in the accumulator. In the next clock cycle I take the next 4 bits, 
multiply it with the second operand, sum up the partial products and add 
this to my accumulator. This is performed a few times until I have processed 
all the bits of operand one. Then my result is stored in the accu.
My implementation works fine but when I synthesize it I get a lot of 
"warnings", can somebody tell me what went wrong here?

Mapping all equations...
Building and optimizing final netlist ...
Register outp_0 equivalent to accu1_8 has been removed
Register outp_1 equivalent to accu1_9 has been removed
Register outp_2 equivalent to accu1_10 has been removed
Register outp_3 equivalent to accu1_11 has been removed
Register outp_4 equivalent to accu1_12 has been removed
Register outp_5 equivalent to accu1_13 has been removed
Register outp_6 equivalent to accu1_14 has been removed
Register outp_7 equivalent to accu1_15 has been removed
Register outp_8 equivalent to accu1_16 has been removed
Register outp_9 equivalent to accu1_17 has been removed
and so on...

The code for accu1 and outp looks the following:

 if rst = '1' then
     op1 <= (others => '0');
     op2 <= (others => '0');
     outp <= (others => '0');
     accu1 <= (others => '0');

  elsif clk'event and clk = '1' then
       if load = '1' then
          op1 <= inp0;
          op2 <= inp1;
       end if;
       if shift = '1' then
          op2 <= op2((2*width-10 downto 0) & (7 downto 0 => '0');
       end if;
       if acc = '1' then
          accu1 <= accu((2*width-1) downto 0) & (7 downto 0 => '0');
          outp<= "00" & accu((2*width-3) downto 0);
       end if;
  end if;
  end process;

accu represents always the newest Accumulator value. Hope somebody can 
explain me how to get rid of all these warnings

Cheers
Philipp