>
> Thanks for the answers. So it shouldn't give any problems.
>
> I assume that having only the LMB bus, will still allow me to divide the
> code into a bootloader and application part. And to download the application
> into a reserved address range in the BRAM?!
>
> Frank
>
> "Paul Hartke" <phartke@Stanford.EDU> wrote in message
> news:42569481.C1817F26@Stanford.EDU...
> > No problem having both LMB and OPB BRAM visible to the same processor as
> > long as the addresses are not overlapping as indicated in the original
> > post.
> >
> > I agree that LMB is likely preferred if the Microblaze is the only
> > entity to access the memory space. OPB BRAM might be needed if other
> > peripherals require access to the memory such as a DMA engine.
> >
> > Paul
> >
> > Aurelian Lazarut wrote:
> >>
> >> Frank,
> >> why not having the whole bram (sum of your LMB and OPB) attached to LMB
> >> only? how is helping you if you have two mems on different buses? (OBP
> >> can get slow if you have to many peripherals...)
> >> Aurash
> >>
> >> Frank van Eijkelenburg wrote:
> >>
> >> >Hi,
> >> >
> >> >We have a design with a microblaze which runs from bram at startup
> >> >(connected through the LMB bus). After startup it is possible to
> >> >download an
> >> >application to sdram (connected through the OPB bus) and run from sdram.
> >> >Since we are going to change the fpga type and get a lot more brams
> >> >available; we are thinking to remove the sdram (to reduce costs) and
> >> >replace
> >> >it by bram.
> >> >
> >> >My question is: is it possible to have a microblaze with bram connected
> >> >to
> >> >the LMB bus and a seperate bram connected to the OPB bus and have
> >> >different
> >> >programs in the brams (a bootloader in de bram which is connected to the
> >> >LMB
> >> >bus, and an application downloaded at runtime in the bram which is
> >> >connected
> >> >to the OPB bus) and run both of them (not at the same time of course)?
> >> >
> >> >As far as I can see, it doesn't matter what kind of memory is used for
> >> >the
> >> >application (bram or sdram) as long as the code is built to run from the
> >> >correct addresses. Can anyone confirm this and/or has experience with
> >> >this?
> >> >
> >> >Thanks in advance,
> >> >Frank
> >> >
> >> >
> >> >
> >> >
> >>
> >> --
> >> __
> >> / /\/\ Aurelian Lazarut
> >> \ \ / System Verification Engineer
> >> / / \ Xilinx Ireland
> >> \_\/\/
> >>
> >> phone: 353 01 4032639
> >> fax: 353 01 4640324
> >>
> >>
Reply by Frank van Eijkelenburg●April 12, 20052005-04-12
Thanks for the answers. So it shouldn't give any problems.
I assume that having only the LMB bus, will still allow me to divide the
code into a bootloader and application part. And to download the application
into a reserved address range in the BRAM?!
Frank
"Paul Hartke" <phartke@Stanford.EDU> wrote in message
news:42569481.C1817F26@Stanford.EDU...
> No problem having both LMB and OPB BRAM visible to the same processor as
> long as the addresses are not overlapping as indicated in the original
> post.
>
> I agree that LMB is likely preferred if the Microblaze is the only
> entity to access the memory space. OPB BRAM might be needed if other
> peripherals require access to the memory such as a DMA engine.
>
> Paul
>
> Aurelian Lazarut wrote:
>>
>> Frank,
>> why not having the whole bram (sum of your LMB and OPB) attached to LMB
>> only? how is helping you if you have two mems on different buses? (OBP
>> can get slow if you have to many peripherals...)
>> Aurash
>>
>> Frank van Eijkelenburg wrote:
>>
>> >Hi,
>> >
>> >We have a design with a microblaze which runs from bram at startup
>> >(connected through the LMB bus). After startup it is possible to
>> >download an
>> >application to sdram (connected through the OPB bus) and run from sdram.
>> >Since we are going to change the fpga type and get a lot more brams
>> >available; we are thinking to remove the sdram (to reduce costs) and
>> >replace
>> >it by bram.
>> >
>> >My question is: is it possible to have a microblaze with bram connected
>> >to
>> >the LMB bus and a seperate bram connected to the OPB bus and have
>> >different
>> >programs in the brams (a bootloader in de bram which is connected to the
>> >LMB
>> >bus, and an application downloaded at runtime in the bram which is
>> >connected
>> >to the OPB bus) and run both of them (not at the same time of course)?
>> >
>> >As far as I can see, it doesn't matter what kind of memory is used for
>> >the
>> >application (bram or sdram) as long as the code is built to run from the
>> >correct addresses. Can anyone confirm this and/or has experience with
>> >this?
>> >
>> >Thanks in advance,
>> >Frank
>> >
>> >
>> >
>> >
>>
>> --
>> __
>> / /\/\ Aurelian Lazarut
>> \ \ / System Verification Engineer
>> / / \ Xilinx Ireland
>> \_\/\/
>>
>> phone: 353 01 4032639
>> fax: 353 01 4640324
>>
>>
Reply by Paul Hartke●April 8, 20052005-04-08
No problem having both LMB and OPB BRAM visible to the same processor as
long as the addresses are not overlapping as indicated in the original
post.
I agree that LMB is likely preferred if the Microblaze is the only
entity to access the memory space. OPB BRAM might be needed if other
peripherals require access to the memory such as a DMA engine.
Paul
Aurelian Lazarut wrote:
>
> Frank,
> why not having the whole bram (sum of your LMB and OPB) attached to LMB
> only? how is helping you if you have two mems on different buses? (OBP
> can get slow if you have to many peripherals...)
> Aurash
>
> Frank van Eijkelenburg wrote:
>
> >Hi,
> >
> >We have a design with a microblaze which runs from bram at startup
> >(connected through the LMB bus). After startup it is possible to download an
> >application to sdram (connected through the OPB bus) and run from sdram.
> >Since we are going to change the fpga type and get a lot more brams
> >available; we are thinking to remove the sdram (to reduce costs) and replace
> >it by bram.
> >
> >My question is: is it possible to have a microblaze with bram connected to
> >the LMB bus and a seperate bram connected to the OPB bus and have different
> >programs in the brams (a bootloader in de bram which is connected to the LMB
> >bus, and an application downloaded at runtime in the bram which is connected
> >to the OPB bus) and run both of them (not at the same time of course)?
> >
> >As far as I can see, it doesn't matter what kind of memory is used for the
> >application (bram or sdram) as long as the code is built to run from the
> >correct addresses. Can anyone confirm this and/or has experience with this?
> >
> >Thanks in advance,
> >Frank
> >
> >
> >
> >
>
> --
> __
> / /\/\ Aurelian Lazarut
> \ \ / System Verification Engineer
> / / \ Xilinx Ireland
> \_\/\/
>
> phone: 353 01 4032639
> fax: 353 01 4640324
>
>
Reply by Aurelian Lazarut●April 8, 20052005-04-08
Frank,
why not having the whole bram (sum of your LMB and OPB) attached to LMB
only? how is helping you if you have two mems on different buses? (OBP
can get slow if you have to many peripherals...)
Aurash
Frank van Eijkelenburg wrote:
>Hi,
>
>We have a design with a microblaze which runs from bram at startup
>(connected through the LMB bus). After startup it is possible to download an
>application to sdram (connected through the OPB bus) and run from sdram.
>Since we are going to change the fpga type and get a lot more brams
>available; we are thinking to remove the sdram (to reduce costs) and replace
>it by bram.
>
>My question is: is it possible to have a microblaze with bram connected to
>the LMB bus and a seperate bram connected to the OPB bus and have different
>programs in the brams (a bootloader in de bram which is connected to the LMB
>bus, and an application downloaded at runtime in the bram which is connected
>to the OPB bus) and run both of them (not at the same time of course)?
>
>As far as I can see, it doesn't matter what kind of memory is used for the
>application (bram or sdram) as long as the code is built to run from the
>correct addresses. Can anyone confirm this and/or has experience with this?
>
>Thanks in advance,
>Frank
>
>
>
>
Reply by Frank van Eijkelenburg●April 8, 20052005-04-08
Hi,
We have a design with a microblaze which runs from bram at startup
(connected through the LMB bus). After startup it is possible to download an
application to sdram (connected through the OPB bus) and run from sdram.
Since we are going to change the fpga type and get a lot more brams
available; we are thinking to remove the sdram (to reduce costs) and replace
it by bram.
My question is: is it possible to have a microblaze with bram connected to
the LMB bus and a seperate bram connected to the OPB bus and have different
programs in the brams (a bootloader in de bram which is connected to the LMB
bus, and an application downloaded at runtime in the bram which is connected
to the OPB bus) and run both of them (not at the same time of course)?
As far as I can see, it doesn't matter what kind of memory is used for the
application (bram or sdram) as long as the code is built to run from the
correct addresses. Can anyone confirm this and/or has experience with this?
Thanks in advance,
Frank