> How does one properly synthesize and simulate a bidirectional
> port on the Virtex-4 using ISE 7.1i.
>
> I drafted code from an earlier Spartan 3 design, which synthesized
> nicely. On the Virtex-4, the T signals is not registered although
> the block diagram indicates that it could be.
>
> Also, the ISE simulator does not show any output values on the
> inout ports.
>
> Thanks,
>
> Brad Smallridge
>
> sram_tristate_process:process(sram_clk)
> begin
> if( sram_clk'event and sram_clk='1') then
> if( sram_cam_en_2='1' ) then
> sram_flash_data <= sram_write_data;
> else
> sram_flash_data <= (others=>'Z');
> end if;
> end if;
> end process;
>
> sram_read_data_process:process(sram_clk)
> begin
> if(sram_clk'event and sram_clk='1') then
> sram_read_data <= sram_flash_data; -- 36 bit
> end if;
> end process;
Brad - I also haven't figured out how to simulate a bi-directional port
using ISE.
The code below is basically what I've used for a bi-directional
register.
write_reg: process ( clk ) is
begin
if rising_edge( clk ) then
if reg_sel = '1' and write = '1' then
my_reg <= data;
end if;
end if;
end process;
read_reg: process ( reg_sel, read_reg, my_reg ) is
begin
if reg_sel = '1' and read_reg = '1' then
data <= my_reg;
else
data < = (others => 'Z');
end if;
end process;
HTH
-Dave Pollum
Reply by Brad Smallridge●January 23, 20062006-01-23
How does one properly synthesize and simulate a bidirectional
port on the Virtex-4 using ISE 7.1i.
I drafted code from an earlier Spartan 3 design, which synthesized
nicely. On the Virtex-4, the T signals is not registered although
the block diagram indicates that it could be.
Also, the ISE simulator does not show any output values on the
inout ports.
Thanks,
Brad Smallridge
sram_tristate_process:process(sram_clk)
begin
if( sram_clk'event and sram_clk='1') then
if( sram_cam_en_2='1' ) then
sram_flash_data <= sram_write_data;
else
sram_flash_data <= (others=>'Z');
end if;
end if;
end process;
sram_read_data_process:process(sram_clk)
begin
if(sram_clk'event and sram_clk='1') then
sram_read_data <= sram_flash_data; -- 36 bit
end if;
end process;