Luc

Thanks for your thoughts, and to everyone else for that matter. It is
actually a personal project of mine so I am free to use whatever device I
need. I think I may go with a Xilinx device but at the moment not sure
which one. Think I will probably do some simulation in ISE first to see
which device is the best for this application.

Jon

Hi Jon,

Some considerations as I'm working on a similar design.
I assume that you will demux the incoming datastream to 125MHz @16bit.
This datastream can be fed to the DDR memory (also running at 125MHz -
or maybe faster to give you some headroom.
Both Spartan3 and Cyclone will have 'problems' (I mean careful design
of the DDR interface) at anything faster than 133MHz (or 266Mbps).
Virtex2 or Stratix are then an option.
However if you care about your budget, you might concider moving to
another lowcost FPGA device, namely the EC or ECP of Lattice.
Of course if the company's strategy is to use Altera or Xilinx, I
would concider V2 or Stratix and not the Spartan/Cyclone.

Best regards,

Luc

On Fri, 24 Feb 2006 14:31:11 -0600, "maxascent"
<maxascent@yahoo.co.uk> wrote:

>Hi
>
>I am using a 8-bit ADC with parallel LVDS outputs clocked at 250MHz. I
>want to interface this to a FPGA, then place the samples into a DDR
>memory. Then send the samples from memory via ethernet to a PC. Can you
>recommend an FPGA from either Xilinx or Altera to do the job.
>
>Thanks
>
>Jon

You should check out the EC family from Lattice.  It has built in DDR
memory control logic and makes interfacing up to 200Mhz possible with a
low cost fabric.

Antti,

You are correct.  What I mean is this new, or newer.

Anything older is probably not capable of doing what they want.

Anything this new, or newer should be capable of doing what they want, 
and is also available at reasonable prices in a reasonable time.

Thanks,

Austin

Antti Lukats wrote:

> "Austin Lesea" <austin@xilinx.com> schrieb im Newsbeitrag 
> news:dtnstk$o8m5@xco-news.xilinx.com...
> 
>>Jon,
>>
>>Anything newer than Virtex II/Spartan 3 (Xilinx), or Cyclone/Stratix 
>>(Altera).
>>
>>Your choice,
>>
>>Austin
>>
>>maxascent wrote:
>>
>>
>>>Hi
>>>
>>>I am using a 8-bit ADC with parallel LVDS outputs clocked at 250MHz. I
>>>want to interface this to a FPGA, then place the samples into a DDR
>>>memory. Then send the samples from memory via ethernet to a PC. Can you
>>>recommend an FPGA from either Xilinx or Altera to do the job.
>>>
>>>Thanks
>>>
>>>Jon
> 
> 
> Austin,
> 
> you say 'newer than Spartan-3' - does it mean that Spartan-3 is now really 
> on the non-recommended list of Xilinx devices, or ?
> 
> Spartan-3e is not fully covering all the Spartan-3 range so it can not be 
> considered as replacement as there are no real large S3e devices at all.
> 
> Antti 
> 
> 

"Austin Lesea" <austin@xilinx.com> schrieb im Newsbeitrag 
news:dtnstk$o8m5@xco-news.xilinx.com...
> Jon,
>
> Anything newer than Virtex II/Spartan 3 (Xilinx), or Cyclone/Stratix 
> (Altera).
>
> Your choice,
>
> Austin
>
> maxascent wrote:
>
>> Hi
>>
>> I am using a 8-bit ADC with parallel LVDS outputs clocked at 250MHz. I
>> want to interface this to a FPGA, then place the samples into a DDR
>> memory. Then send the samples from memory via ethernet to a PC. Can you
>> recommend an FPGA from either Xilinx or Altera to do the job.
>>
>> Thanks
>>
>> Jon

Austin,

you say 'newer than Spartan-3' - does it mean that Spartan-3 is now really 
on the non-recommended list of Xilinx devices, or ?

Spartan-3e is not fully covering all the Spartan-3 range so it can not be 
considered as replacement as there are no real large S3e devices at all.

Antti 

Jon,

Anything newer than Virtex II/Spartan 3 (Xilinx), or Cyclone/Stratix 
(Altera).

Your choice,

Austin

maxascent wrote:

> Hi
> 
> I am using a 8-bit ADC with parallel LVDS outputs clocked at 250MHz. I
> want to interface this to a FPGA, then place the samples into a DDR
> memory. Then send the samples from memory via ethernet to a PC. Can you
> recommend an FPGA from either Xilinx or Altera to do the job.
> 
> Thanks
> 
> Jon

Hi

I am using a 8-bit ADC with parallel LVDS outputs clocked at 250MHz. I
want to interface this to a FPGA, then place the samples into a DDR
memory. Then send the samples from memory via ethernet to a PC. Can you
recommend an FPGA from either Xilinx or Altera to do the job.

Thanks

Jon