On 7/3/20 12:10 AM, Rick C wrote:
> On Thursday, July 2, 2020 at 11:28:26 PM UTC-4, Richard Damon wrote:
>> On 6/29/20 11:06 AM, Rick C wrote:
>>> On Monday, June 29, 2020 at 9:02:04 AM UTC-4, Richard Damon wrote:
>>>> On 6/29/20 6:59 AM, Rick C wrote:
>>>>> On Monday, June 29, 2020 at 1:50:11 AM UTC-4, Brane 2 wrote:
>>>>>> One important factor is probably propagation time.
>>>>>>
>>>>>> It scerews whole 180° + 180° equation and probably moves the quartz in a suboptimal operating region.
>>>>>
>>>>> So a slow inverter (like CMOS) would have the same problem, no?  How much delay is acceptable?  I don't know any inverters that don't have measurable delay.  
>>>>>
>>>>
>>>> It is more of an issue of propagation time vs transition time. When you
>>>> stack multiple stages together so that the propagation time is enough
>>>> bigger than transition time, you go into a different oscillatory
>>>> behavior than when the propagation time is smaller.
>>>>
>>>> It is a matter where the phase lag from the delay occurs compared to the
>>>> system gain. If it cause 180 degrees of shift + the 180 degrees from the
>>>> inversion when the system still have net gain, you will get a natural
>>>> oscillation (a ring oscillator). Since a crystal has a very high Q, as
>>>> long as the phase lag from delay doesn't get near 180 degrees, it
>>>> doesn't affect the frequency that much, but the amplifier does need to
>>>> be stable to work, which a network that forms a ring oscillator isn't
>>>
>>> Sorry, I'm not following how propagation time should be compared to transition times.  In a 32kHz crystal oscillator will the propagation time matter so much??? 
>>>
>>
>> Not of the crystal, but of the 'gate' that is acting like the amplifier.
>> If the 'amplifier' has enough 'delay' compared to it 'gain'/'transition
>> time' then it will spontaneously oscillate at a frequency based on its
>> delay as a ring oscillator. At these frequency the crystal will
>> basically act like a capacitor and just couple the signal through.
> 
> The crystal is a capacitor in series with an inductor in a series resonant circuit, low impedance at resonance, high impedance elsewhere.  The delays you are describing would oscillate on the order of 100 MHz.  A 32 kHz crystal isn't going to pass that very well.  Neither does a 1 Mohm resistor and the 20 pF loading caps with a corner frequency of 8kHz.  
> 

The standard electrical model for a capacitor is a series R-L-C network
in parallel with another C (the 'bulk capacitance' of the device limits
the impedance at very high frequency). It doesn't really matter that
this network has a lot of attenuation at this frequency, if the
multi-stage amplifier has more gain than that.

Yes, if there is enough attenuation, you can stop the ring oscillator,
but you need to KNOW the gain to be able to make sure you have enough
attenuation.

On Thursday, July 2, 2020 at 9:10:18 PM UTC-7, Rick C wrote:
...
> The crystal is a capacitor in series with an inductor in a series resonan=
t circuit, low impedance at resonance, high impedance elsewhere.  The delay=
s you are describing would oscillate on the order of 100 MHz.  A 32 kHz cry=
stal isn't going to pass that very well.  Neither does a 1 Mohm resistor an=
d the 20 pF loading caps with a corner frequency of 8kHz. =20
...

Crystals also have a parallel resonance mode at a frequency slightly above =
that of the series resonance mode.

Most crystals are calibrated for this parallel mode - I have never seen a 3=
2kHz crystal that wasn't.

For a crystal in parallel resonance mode, the amplifier should have ~180 de=
g phase shift and high input impedance and a reasonably high output impedan=
ce. The effective capacitance across the crystal is required to be the same=
 as that for which it was calibrated to be on frequency. Typically this is =
20pF for high-frequency crystals and as low as 6pF for 32kHz ones.

Most oscillators are variants of the Pierce oscillator.

kevin

On Thursday, July 2, 2020 at 11:55:55 PM UTC-4, Richard Damon wrote:
> On 6/29/20 11:04 AM, Rick C wrote:
> >=20
> > There is nothing about oscillations that requires a "linear region" of =
operation.  All oscillators have wide fluctuations on the output essentiall=
y like the amp has infinite gain.  Most of the time it is desired that the =
output have rapid transitions.  The DC biasing comes from having appropriat=
ely scaled high and low times so the DC average is at the threshold.=20
>=20
> Note, I said pseudo-linear, a region where a small change in the input
> will make a somewhat related change to the output. If the output
> actually gets to the point of saturating, you lose gain, so if you
> didn't have enough gain prior to getting there, you didn't have enough
> gain to oscillate at the resonate frequency of the crystal.

The gain required to sustain oscillations is 1.  The crystal has a very low=
 impedance at resonance so a lot of gain is not required.  In fact the circ=
uit will have to saturate because that is how the gain stabilizes at 1.=20


> When you are exciting the crystal at its resonate frequency, as the
> output is reaching its positive pseudo linear excursion, the input is
> being driven to its negative most point and the crystal then starts to
> pull it positive, causing the output to start to drive negative. If you

???


> > You have not addressed the timing issues I've pointed out by providing =
data.  There is not a huge difference in propagation delays in the two devi=
ces.  This is a path that can be highly optimized simply by specifying a ti=
ght timing spec to get a number close to 10 ns while the CMOS buffer is als=
o in that same range.  Waving your hands and talking about excessive routin=
g delays is not a persuasive argument. =20
> >=20
>=20
> The Gate Array even if it has the same propagation delay, may have a
> significantly higher analog gain if you try to bias it into the linear
> region, due to the fact that it isn't a single stage but multiple stage.
> This higher gain may allow that same propagation delay to now have
> sufficent loop gain to self oscillate. as a ring oscillator, especially
> when you add some additional phase angle from the R-C loading of the
> output to the load capacitor for the crystal.

You keep talking about the oscillator operating at very high frequencies de=
fined by the delay.  The crystal that links the input and output is a serie=
s resonant circuit with a large impedance everywhere other than at the reso=
nant frequency.  It will also operate at overtones, but the load capacitors=
 help to prevent that.=20


> There simple gate, has a much lower gain, because it will be a single
> stage amplifier, and thus doesn't have enough gain at the frequency
> where this loop gets a total of 360 degrees of phase (180 from the
> inversion, plus 180 from delays).

At high levels of oscillation the gain of the overall circuit is 1.  That's=
 true for every stable oscillator. =20

--=20

  Rick C.

  -++ Get 1,000 miles of free Supercharging
  -++ Tesla referral code - https://ts.la/richard11209

On Thursday, July 2, 2020 at 11:28:26 PM UTC-4, Richard Damon wrote:
> On 6/29/20 11:06 AM, Rick C wrote:
> > On Monday, June 29, 2020 at 9:02:04 AM UTC-4, Richard Damon wrote:
> >> On 6/29/20 6:59 AM, Rick C wrote:
> >>> On Monday, June 29, 2020 at 1:50:11 AM UTC-4, Brane 2 wrote:
> >>>> One important factor is probably propagation time.
> >>>>
> >>>> It scerews whole 180=C2=B0 + 180=C2=B0 equation and probably moves t=
he quartz in a suboptimal operating region.
> >>>
> >>> So a slow inverter (like CMOS) would have the same problem, no?  How =
much delay is acceptable?  I don't know any inverters that don't have measu=
rable delay. =20
> >>>
> >>
> >> It is more of an issue of propagation time vs transition time. When yo=
u
> >> stack multiple stages together so that the propagation time is enough
> >> bigger than transition time, you go into a different oscillatory
> >> behavior than when the propagation time is smaller.
> >>
> >> It is a matter where the phase lag from the delay occurs compared to t=
he
> >> system gain. If it cause 180 degrees of shift + the 180 degrees from t=
he
> >> inversion when the system still have net gain, you will get a natural
> >> oscillation (a ring oscillator). Since a crystal has a very high Q, as
> >> long as the phase lag from delay doesn't get near 180 degrees, it
> >> doesn't affect the frequency that much, but the amplifier does need to
> >> be stable to work, which a network that forms a ring oscillator isn't
> >=20
> > Sorry, I'm not following how propagation time should be compared to tra=
nsition times.  In a 32kHz crystal oscillator will the propagation time mat=
ter so much???=20
> >=20
>=20
> Not of the crystal, but of the 'gate' that is acting like the amplifier.
> If the 'amplifier' has enough 'delay' compared to it 'gain'/'transition
> time' then it will spontaneously oscillate at a frequency based on its
> delay as a ring oscillator. At these frequency the crystal will
> basically act like a capacitor and just couple the signal through.

The crystal is a capacitor in series with an inductor in a series resonant =
circuit, low impedance at resonance, high impedance elsewhere.  The delays =
you are describing would oscillate on the order of 100 MHz.  A 32 kHz cryst=
al isn't going to pass that very well.  Neither does a 1 Mohm resistor and =
the 20 pF loading caps with a corner frequency of 8kHz. =20

--=20

  Rick C.

  -+- Get 1,000 miles of free Supercharging
  -+- Tesla referral code - https://ts.la/richard11209

On 6/29/20 11:04 AM, Rick C wrote:
> On Monday, June 29, 2020 at 8:47:04 AM UTC-4, Richard Damon wrote:
>> On 6/28/20 10:41 PM, Rick C wrote:
>>> On Sunday, June 28, 2020 at 3:19:07 PM UTC-4, Richard Damon wrote:
>>>> On 6/16/20 5:20 AM, Brane 2 wrote:
>>>>> I tireid using ust a pin pair and inverting function.
>>>>>
>>>>> But with LVCMOS333 on Breakout Board ( 3,3V for I/O), MachXO implements hysteresis on input and this seems to hamper the oscillations.
>>>>>
>>>>> I can't start the crystal reliably. If oscillation starts, it runs fine.
>>>>>
>>>>> I used siimple 24MHz quartz with 1M across and 22pF toward GND on each side.
>>>>>
>>>>> Can't find anythong on the matter on Lattice...
>>>>>
>>>>
>>>> One comment on this, the basic circuit for a crystal oscilator doesn't
>>>> need an 'Inverter' from pin to pin, but an inverting amplifier. At the
>>>> crystal resonate frequency, it provides 180 degrees of phase shift,
>>>> giving positive gain at that frequency, and oscilation.
>>>>
>>>> A typical inverter chip will bias itself into its quasi-linear region
>>>> and normally oscillate.
>>>>
>>>> A generic pair of pins is unlikely to end up biasing itself this way
>>>> reliably. You are more apt to end up with a relaxation oscillator whose
>>>> frequency is based on the capacative load and propagation times.
>>>
>>> I would ask what difference you see between an inverter chip and an inverting function in a more complex device that is relevant in this situation?  
>>>
>>> The point where the bias is important is the input pin.  Can you explain what DC level you might expect to see at this input pin that would not be very close to the input threshold voltage? 
>>>
>>> One of these days I should connect an input and output through a resistor to see just what it does with different delays in the path.  Then add a few different crystals to see what happens. 
>>>
>>
>> The key issue is that you are going to end up with multiple
>> buffers/inverters with a routing delay between, and high enough gains
>> that you probably can not get the system to bias both buffers, and the
>> interconnect in the pseudo-linear region.
> 
> There is nothing about oscillations that requires a "linear region" of operation.  All oscillators have wide fluctuations on the output essentially like the amp has infinite gain.  Most of the time it is desired that the output have rapid transitions.  The DC biasing comes from having appropriately scaled high and low times so the DC average is at the threshold. 

Note, I said pseudo-linear, a region where a small change in the input
will make a somewhat related change to the output. If the output
actually gets to the point of saturating, you lose gain, so if you
didn't have enough gain prior to getting there, you didn't have enough
gain to oscillate at the resonate frequency of the crystal.

When you are exciting the crystal at its resonate frequency, as the
output is reaching its positive pseudo linear excursion, the input is
being driven to its negative most point and the crystal then starts to
pull it positive, causing the output to start to drive negative. If you
> 
> 
>> The same thing happens if you link up multiple inverter chips together
>> and then put a crystal in, at some point, actually fairly fast, you
>> switch from a crystal oscillator behavior, where the frequency is
>> controlled largely by the resonate frequency of the crystal, to a ring
>> oscilator, largely controlled by the total propagation time of the loop.
> 
> You have not addressed the timing issues I've pointed out by providing data.  There is not a huge difference in propagation delays in the two devices.  This is a path that can be highly optimized simply by specifying a tight timing spec to get a number close to 10 ns while the CMOS buffer is also in that same range.  Waving your hands and talking about excessive routing delays is not a persuasive argument.  
> 

The Gate Array even if it has the same propagation delay, may have a
significantly higher analog gain if you try to bias it into the linear
region, due to the fact that it isn't a single stage but multiple stage.
This higher gain may allow that same propagation delay to now have
sufficent loop gain to self oscillate. as a ring oscillator, especially
when you add some additional phase angle from the R-C loading of the
output to the load capacitor for the crystal.

There simple gate, has a much lower gain, because it will be a single
stage amplifier, and thus doesn't have enough gain at the frequency
where this loop gets a total of 360 degrees of phase (180 from the
inversion, plus 180 from delays).

On 6/29/20 11:06 AM, Rick C wrote:
> On Monday, June 29, 2020 at 9:02:04 AM UTC-4, Richard Damon wrote:
>> On 6/29/20 6:59 AM, Rick C wrote:
>>> On Monday, June 29, 2020 at 1:50:11 AM UTC-4, Brane 2 wrote:
>>>> One important factor is probably propagation time.
>>>>
>>>> It scerews whole 180° + 180° equation and probably moves the quartz in a suboptimal operating region.
>>>
>>> So a slow inverter (like CMOS) would have the same problem, no?  How much delay is acceptable?  I don't know any inverters that don't have measurable delay.  
>>>
>>
>> It is more of an issue of propagation time vs transition time. When you
>> stack multiple stages together so that the propagation time is enough
>> bigger than transition time, you go into a different oscillatory
>> behavior than when the propagation time is smaller.
>>
>> It is a matter where the phase lag from the delay occurs compared to the
>> system gain. If it cause 180 degrees of shift + the 180 degrees from the
>> inversion when the system still have net gain, you will get a natural
>> oscillation (a ring oscillator). Since a crystal has a very high Q, as
>> long as the phase lag from delay doesn't get near 180 degrees, it
>> doesn't affect the frequency that much, but the amplifier does need to
>> be stable to work, which a network that forms a ring oscillator isn't
> 
> Sorry, I'm not following how propagation time should be compared to transition times.  In a 32kHz crystal oscillator will the propagation time matter so much??? 
> 

Not of the crystal, but of the 'gate' that is acting like the amplifier.
If the 'amplifier' has enough 'delay' compared to it 'gain'/'transition
time' then it will spontaneously oscillate at a frequency based on its
delay as a ring oscillator. At these frequency the crystal will
basically act like a capacitor and just couple the signal through.

On Monday, June 29, 2020 at 9:02:04 AM UTC-4, Richard Damon wrote:
> On 6/29/20 6:59 AM, Rick C wrote:
> > On Monday, June 29, 2020 at 1:50:11 AM UTC-4, Brane 2 wrote:
> >> One important factor is probably propagation time.
> >>
> >> It scerews whole 180=C2=B0 + 180=C2=B0 equation and probably moves the=
 quartz in a suboptimal operating region.
> >=20
> > So a slow inverter (like CMOS) would have the same problem, no?  How mu=
ch delay is acceptable?  I don't know any inverters that don't have measura=
ble delay. =20
> >=20
>=20
> It is more of an issue of propagation time vs transition time. When you
> stack multiple stages together so that the propagation time is enough
> bigger than transition time, you go into a different oscillatory
> behavior than when the propagation time is smaller.
>=20
> It is a matter where the phase lag from the delay occurs compared to the
> system gain. If it cause 180 degrees of shift + the 180 degrees from the
> inversion when the system still have net gain, you will get a natural
> oscillation (a ring oscillator). Since a crystal has a very high Q, as
> long as the phase lag from delay doesn't get near 180 degrees, it
> doesn't affect the frequency that much, but the amplifier does need to
> be stable to work, which a network that forms a ring oscillator isn't

Sorry, I'm not following how propagation time should be compared to transit=
ion times.  In a 32kHz crystal oscillator will the propagation time matter =
so much???=20

--=20

  Rick C.

  --+ Get 1,000 miles of free Supercharging
  --+ Tesla referral code - https://ts.la/richard11209

On Monday, June 29, 2020 at 8:47:04 AM UTC-4, Richard Damon wrote:
> On 6/28/20 10:41 PM, Rick C wrote:
> > On Sunday, June 28, 2020 at 3:19:07 PM UTC-4, Richard Damon wrote:
> >> On 6/16/20 5:20 AM, Brane 2 wrote:
> >>> I tireid using ust a pin pair and inverting function.
> >>>
> >>> But with LVCMOS333 on Breakout Board ( 3,3V for I/O), MachXO implemen=
ts hysteresis on input and this seems to hamper the oscillations.
> >>>
> >>> I can't start the crystal reliably. If oscillation starts, it runs fi=
ne.
> >>>
> >>> I used siimple 24MHz quartz with 1M across and 22pF toward GND on eac=
h side.
> >>>
> >>> Can't find anythong on the matter on Lattice...
> >>>
> >>
> >> One comment on this, the basic circuit for a crystal oscilator doesn't
> >> need an 'Inverter' from pin to pin, but an inverting amplifier. At the
> >> crystal resonate frequency, it provides 180 degrees of phase shift,
> >> giving positive gain at that frequency, and oscilation.
> >>
> >> A typical inverter chip will bias itself into its quasi-linear region
> >> and normally oscillate.
> >>
> >> A generic pair of pins is unlikely to end up biasing itself this way
> >> reliably. You are more apt to end up with a relaxation oscillator whos=
e
> >> frequency is based on the capacative load and propagation times.
> >=20
> > I would ask what difference you see between an inverter chip and an inv=
erting function in a more complex device that is relevant in this situation=
? =20
> >=20
> > The point where the bias is important is the input pin.  Can you explai=
n what DC level you might expect to see at this input pin that would not be=
 very close to the input threshold voltage?=20
> >=20
> > One of these days I should connect an input and output through a resist=
or to see just what it does with different delays in the path.  Then add a =
few different crystals to see what happens.=20
> >=20
>=20
> The key issue is that you are going to end up with multiple
> buffers/inverters with a routing delay between, and high enough gains
> that you probably can not get the system to bias both buffers, and the
> interconnect in the pseudo-linear region.

There is nothing about oscillations that requires a "linear region" of oper=
ation.  All oscillators have wide fluctuations on the output essentially li=
ke the amp has infinite gain.  Most of the time it is desired that the outp=
ut have rapid transitions.  The DC biasing comes from having appropriately =
scaled high and low times so the DC average is at the threshold.=20


> The same thing happens if you link up multiple inverter chips together
> and then put a crystal in, at some point, actually fairly fast, you
> switch from a crystal oscillator behavior, where the frequency is
> controlled largely by the resonate frequency of the crystal, to a ring
> oscilator, largely controlled by the total propagation time of the loop.

You have not addressed the timing issues I've pointed out by providing data=
.  There is not a huge difference in propagation delays in the two devices.=
  This is a path that can be highly optimized simply by specifying a tight =
timing spec to get a number close to 10 ns while the CMOS buffer is also in=
 that same range.  Waving your hands and talking about excessive routing de=
lays is not a persuasive argument. =20

--=20

  Rick C.

  --- Get 1,000 miles of free Supercharging
  --- Tesla referral code - https://ts.la/richard11209

On 6/29/20 6:59 AM, Rick C wrote:
> On Monday, June 29, 2020 at 1:50:11 AM UTC-4, Brane 2 wrote:
>> One important factor is probably propagation time.
>>
>> It scerews whole 180° + 180° equation and probably moves the quartz in a suboptimal operating region.
> 
> So a slow inverter (like CMOS) would have the same problem, no?  How much delay is acceptable?  I don't know any inverters that don't have measurable delay.  
> 

It is more of an issue of propagation time vs transition time. When you
stack multiple stages together so that the propagation time is enough
bigger than transition time, you go into a different oscillatory
behavior than when the propagation time is smaller.

It is a matter where the phase lag from the delay occurs compared to the
system gain. If it cause 180 degrees of shift + the 180 degrees from the
inversion when the system still have net gain, you will get a natural
oscillation (a ring oscillator). Since a crystal has a very high Q, as
long as the phase lag from delay doesn't get near 180 degrees, it
doesn't affect the frequency that much, but the amplifier does need to
be stable to work, which a network that forms a ring oscillator isn't

On 6/28/20 10:41 PM, Rick C wrote:
> On Sunday, June 28, 2020 at 3:19:07 PM UTC-4, Richard Damon wrote:
>> On 6/16/20 5:20 AM, Brane 2 wrote:
>>> I tireid using ust a pin pair and inverting function.
>>>
>>> But with LVCMOS333 on Breakout Board ( 3,3V for I/O), MachXO implements hysteresis on input and this seems to hamper the oscillations.
>>>
>>> I can't start the crystal reliably. If oscillation starts, it runs fine.
>>>
>>> I used siimple 24MHz quartz with 1M across and 22pF toward GND on each side.
>>>
>>> Can't find anythong on the matter on Lattice...
>>>
>>
>> One comment on this, the basic circuit for a crystal oscilator doesn't
>> need an 'Inverter' from pin to pin, but an inverting amplifier. At the
>> crystal resonate frequency, it provides 180 degrees of phase shift,
>> giving positive gain at that frequency, and oscilation.
>>
>> A typical inverter chip will bias itself into its quasi-linear region
>> and normally oscillate.
>>
>> A generic pair of pins is unlikely to end up biasing itself this way
>> reliably. You are more apt to end up with a relaxation oscillator whose
>> frequency is based on the capacative load and propagation times.
> 
> I would ask what difference you see between an inverter chip and an inverting function in a more complex device that is relevant in this situation?  
> 
> The point where the bias is important is the input pin.  Can you explain what DC level you might expect to see at this input pin that would not be very close to the input threshold voltage? 
> 
> One of these days I should connect an input and output through a resistor to see just what it does with different delays in the path.  Then add a few different crystals to see what happens. 
> 

The key issue is that you are going to end up with multiple
buffers/inverters with a routing delay between, and high enough gains
that you probably can not get the system to bias both buffers, and the
interconnect in the pseudo-linear region.

The same thing happens if you link up multiple inverter chips together
and then put a crystal in, at some point, actually fairly fast, you
switch from a crystal oscillator behavior, where the frequency is
controlled largely by the resonate frequency of the crystal, to a ring
oscilator, largely controlled by the total propagation time of the loop.