Helloo,
        Anyone who worked with MIG ddr controller please help me.
subint wrote:
> Hi,
>   I am using the DDR controller(generated by MIG1.5) for the ddr
> MT46V32M16 -6 for the board V4MBlx60. I am getting the expected result
> in simulation with the hdl code generated by the MIG.But when i tried
> to simulate the post-par model of the code all interfaces to the ddr
> are driven with x.Any idea.
> thanks in advance
> subin

Hi,
  I am using the DDR controller(generated by MIG1.5) for the ddr
MT46V32M16 -6 for the board V4MBlx60. I am getting the expected result
in simulation with the hdl code generated by the MIG.But when i tried
to simulate the post-par model of the code all interfaces to the ddr
are driven with x.Any idea.
thanks in advance
subin