Hi,
I am learning Modelsim (6.1e) along with ISE webpack. I had done a
behavior simulation, then a post-translate simulation. Now, I go back
to do the behavioral simulation again. When I am in Modelsim, I modify
the source vhdl code after I terminate the simulation. I recompile it.
Then I simulate the testbench file. I find that the simulation is on
the post-translation, not the behavioral simulation model. Why? Must I
go back to ISE and relaunch the Modelsim?
The following is the script. Why does it automatically compile
smallComp_translate.vhd?


vcom -explicit -93 -O0 C:/Xilinx/x/test/smallComp.vhd
C:/Xilinx/x/test/netgen/translate/smallComp_translate.vhd
# Model Technology ModelSim XE III vcom 6.1e Compiler 2006.03 Mar  8
2006
# -- Loading package standard
# -- Loading package std_logic_1164
# -- Loading package std_logic_arith
# -- Loading package std_logic_unsigned
# -- Compiling entity smallcomp
# -- Compiling architecture behavioral of smallcomp
# -- Loading package vital_timing