>
> Rob,
>
> Even the 2.5V Vccaux parts are 3.3V JTAG compatible (ie Virtex II Pro,
> Spartan 3).
>
> The JTAG inputs are designed to be 3.3V tolerant (special cells), and the
> JTAG outputs are open drain, and use external pullup resistors to 3.3V.
> The outputs are also special cells (not regular IOBs).
>
> Austin
>
> Rob Judd wrote:
>
> > Hi y'all,
> >
> > Right, we're making some progress on parts sourcing, thanks in no small
> > way to some of you out there who shall remain nameless to avoid
> > embarrassment. (Thanks!)
> >
> > What has come up next is the requirement for a JTAG programmer. I've
> > found one here:
> >
> > http://www.ee.latrobe.edu.au/~djc/PALS/SMALL_PALS.htm
> >
> > but wonder whether using it on devices only capable of 3v3 or lower may
> > kill them. I'm also wondering whether some of the chips I'm considering
> > (Actel APA150, Altera EP1C3/EP1C6, Atmel AT94K05, Xilinx
> > XC2S200E/XC3S200 and Lattice OR3T80) have particular programming needs
> > that make a generic JTAG pod unworkable. If it merely requires level
> > translation, I'm golden.
> >
> > Comments?
> >
> > Rob
Reply by Rob Judd●August 5, 20032003-08-05
Thanks, found it. That looks like exactly the thing. Now where did I put
that breadboard ...
Rob
Andrew Paule wrote:
>
> The HC part on the schematic is supplied with VCC from your board - you
> can also get parts with dual voltage supply that allow this type of
> interface, (CB3T ti parts one example). Check Altera's web site for the
> byteblaster MV, there are schematics for the thing up there too, and you
> could wire through the RESET line so that all TAP controllers would work.
>
> Andrew.
>
> Rob Judd wrote:
>
> >Hi y'all,
> >
> >Right, we're making some progress on parts sourcing, thanks in no small
> >way to some of you out there who shall remain nameless to avoid
> >embarrassment. (Thanks!)
> >
> >What has come up next is the requirement for a JTAG programmer. I've
> >found one here:
> >
> >http://www.ee.latrobe.edu.au/~djc/PALS/SMALL_PALS.htm
> >
> >but wonder whether using it on devices only capable of 3v3 or lower may
> >kill them. I'm also wondering whether some of the chips I'm considering
> >(Actel APA150, Altera EP1C3/EP1C6, Atmel AT94K05, Xilinx
> >XC2S200E/XC3S200 and Lattice OR3T80) have particular programming needs
> >that make a generic JTAG pod unworkable. If it merely requires level
> >translation, I'm golden.
> >
> >Comments?
> >
> >Rob
> >
> >
Reply by Austin Lesea●August 5, 20032003-08-05
Rob,
Even the 2.5V Vccaux parts are 3.3V JTAG compatible (ie Virtex II Pro,
Spartan 3).
The JTAG inputs are designed to be 3.3V tolerant (special cells), and the
JTAG outputs are open drain, and use external pullup resistors to 3.3V.
The outputs are also special cells (not regular IOBs).
Austin
Rob Judd wrote:
> Hi y'all,
>
> Right, we're making some progress on parts sourcing, thanks in no small
> way to some of you out there who shall remain nameless to avoid
> embarrassment. (Thanks!)
>
> What has come up next is the requirement for a JTAG programmer. I've
> found one here:
>
> http://www.ee.latrobe.edu.au/~djc/PALS/SMALL_PALS.htm
>
> but wonder whether using it on devices only capable of 3v3 or lower may
> kill them. I'm also wondering whether some of the chips I'm considering
> (Actel APA150, Altera EP1C3/EP1C6, Atmel AT94K05, Xilinx
> XC2S200E/XC3S200 and Lattice OR3T80) have particular programming needs
> that make a generic JTAG pod unworkable. If it merely requires level
> translation, I'm golden.
>
> Comments?
>
> Rob
Reply by Andrew Paule●August 5, 20032003-08-05
The HC part on the schematic is supplied with VCC from your board - you
can also get parts with dual voltage supply that allow this type of
interface, (CB3T ti parts one example). Check Altera's web site for the
byteblaster MV, there are schematics for the thing up there too, and you
could wire through the RESET line so that all TAP controllers would work.
Andrew.
Rob Judd wrote:
>Hi y'all,
>
>Right, we're making some progress on parts sourcing, thanks in no small
>way to some of you out there who shall remain nameless to avoid
>embarrassment. (Thanks!)
>
>What has come up next is the requirement for a JTAG programmer. I've
>found one here:
>
>http://www.ee.latrobe.edu.au/~djc/PALS/SMALL_PALS.htm
>
>but wonder whether using it on devices only capable of 3v3 or lower may
>kill them. I'm also wondering whether some of the chips I'm considering
>(Actel APA150, Altera EP1C3/EP1C6, Atmel AT94K05, Xilinx
>XC2S200E/XC3S200 and Lattice OR3T80) have particular programming needs
>that make a generic JTAG pod unworkable. If it merely requires level
>translation, I'm golden.
>
>Comments?
>
>Rob
>
>
Reply by Rob Judd●August 5, 20032003-08-05
Hi y'all,
Right, we're making some progress on parts sourcing, thanks in no small
way to some of you out there who shall remain nameless to avoid
embarrassment. (Thanks!)
What has come up next is the requirement for a JTAG programmer. I've
found one here:
http://www.ee.latrobe.edu.au/~djc/PALS/SMALL_PALS.htm
but wonder whether using it on devices only capable of 3v3 or lower may
kill them. I'm also wondering whether some of the chips I'm considering
(Actel APA150, Altera EP1C3/EP1C6, Atmel AT94K05, Xilinx
XC2S200E/XC3S200 and Lattice OR3T80) have particular programming needs
that make a generic JTAG pod unworkable. If it merely requires level
translation, I'm golden.
Comments?
Rob