Gabor schrieb:

> Antti wrote:
> > Gabor schrieb:
> >
> > > I'm seeing some strange behavior when trying to program
> > > a Spartan 2e (XC2S150E) directly via JTAG.  In the system
> > > it is normally programmed using master serial mode from
> > > the XCF02S "platform flash" part.  The JTAG chain starts
> > > with the XCF02S and then ends at the XC2S150E - no
> > > other parts.  I can program the XCF02S without problem
> > > using JTAG.  I can also program the XC2S150E without
> > > problems via JTAG _IF_ the XCF02S is blank.  Once the
> > > FPGA has been programmed from the XCF02S using
> > > master serial mode, which is the normal case after
> > > power-up, attempts to re-program the FPGA using JTAG
> > > fail.  This does not seem to be a problem with the
> > > FPGA running.  I can re-program the FPGA via JTAG
> > > when it is running _IF_ the FPGA was originally configured
> > > via JTAG.  I have opened a web case on this, but I thought
> > > someone here may have some insight on this issue.  I
> > > saw in an old thread the following note:
> > >
> > > David Kinsell wrote:
> > >
> > > We've seen different problems with an XCF02S in the chain ahead of a
> > > Spartan 2 part.  Done never goes high on the Spartan when attempting
> > > JTAG programming.  Take the XCF02 out of the chain and it works.
> > > Discovered that if the XCF02 is blank, then we can program the Spartan
> > > OK.  Xilinx has some answer records (18644 and others) on related
> > > issues, but that didn't seem to apply to us.
> >
> > this issue can cause problems for different parts, no matter if there
> > is an Xilinx AR or not
> >
> > the thing is that if any non-JTAG config interface shifts in valid SYNC
> > word
> > during some specifig time in the JTAG config process then the JTAG
> > configuration will fail.
> >
> > happens with XCFxx master serial mode, happens with Se3 BPI mode (at
> > least early silicon)
> > etc, etc..
> >
> > so just make sure the config is blank
> >
> > antti
>
> Thanks, Antti.
>
> I was hoping this wasn't the answer.  The current hardware revision in
> the
> field requires the FPGA to boot from the XCF02S in order to provide a
> clean reset signal to an embedded processor.  There is no way for the
> processor to boot up and program the FPGA in these boards if the FPGA
> isn't already running some version.  In order to change this behavior
> I need wiring changes to the boards, and using wires I have a lot
> of possible ways to work around the issue.  It would have been nice
> to fix this in "software" only.  Right now my only "software" solution
> is to re-program the XCF02S if I want to upgrade the FPGA bitstream.
> If this process gets interrupted I would end up with a non-working
> system. :-(
>
> Regards,
> Gabor

well there could be a software only solution, but you need to
investigate it I told what the cause, so you need to see if you can
bypass the issue

make a small CPLD that makes an LED "ON" when it sees FPGA config start
pattern being shifted in, attach it to CCLK and DIN then make your own
JTAG config software and single step it to program the FPGA and monitor
the LED, you might be able to find a sequence of JTAG commands that
work and succeed to configure the FPGA no matter if the XCF shifts out
the config SYNC at wrong place.

if you can gurantee deterministic timing of the JTAG config stream then
all you need may be just padding the XCF with dummy to align the SYNC
to a time slot where it does not harm the configuration.

or at very bottom end you may place XCF in EXTEST mode during the
config or at some short time during config to prevent it to trasht the
config.

so it may be doable but may take several weeks to work it out

Antti

Antti wrote:
> Gabor schrieb:
>
> > I'm seeing some strange behavior when trying to program
> > a Spartan 2e (XC2S150E) directly via JTAG.  In the system
> > it is normally programmed using master serial mode from
> > the XCF02S "platform flash" part.  The JTAG chain starts
> > with the XCF02S and then ends at the XC2S150E - no
> > other parts.  I can program the XCF02S without problem
> > using JTAG.  I can also program the XC2S150E without
> > problems via JTAG _IF_ the XCF02S is blank.  Once the
> > FPGA has been programmed from the XCF02S using
> > master serial mode, which is the normal case after
> > power-up, attempts to re-program the FPGA using JTAG
> > fail.  This does not seem to be a problem with the
> > FPGA running.  I can re-program the FPGA via JTAG
> > when it is running _IF_ the FPGA was originally configured
> > via JTAG.  I have opened a web case on this, but I thought
> > someone here may have some insight on this issue.  I
> > saw in an old thread the following note:
> >
> > David Kinsell wrote:
> >
> > We've seen different problems with an XCF02S in the chain ahead of a
> > Spartan 2 part.  Done never goes high on the Spartan when attempting
> > JTAG programming.  Take the XCF02 out of the chain and it works.
> > Discovered that if the XCF02 is blank, then we can program the Spartan
> > OK.  Xilinx has some answer records (18644 and others) on related
> > issues, but that didn't seem to apply to us.
>
> this issue can cause problems for different parts, no matter if there
> is an Xilinx AR or not
>
> the thing is that if any non-JTAG config interface shifts in valid SYNC
> word
> during some specifig time in the JTAG config process then the JTAG
> configuration will fail.
>
> happens with XCFxx master serial mode, happens with Se3 BPI mode (at
> least early silicon)
> etc, etc..
>
> so just make sure the config is blank
>
> antti

Thanks, Antti.

I was hoping this wasn't the answer.  The current hardware revision in
the
field requires the FPGA to boot from the XCF02S in order to provide a
clean reset signal to an embedded processor.  There is no way for the
processor to boot up and program the FPGA in these boards if the FPGA
isn't already running some version.  In order to change this behavior
I need wiring changes to the boards, and using wires I have a lot
of possible ways to work around the issue.  It would have been nice
to fix this in "software" only.  Right now my only "software" solution
is to re-program the XCF02S if I want to upgrade the FPGA bitstream.
If this process gets interrupted I would end up with a non-working
system. :-(

Regards,
Gabor

Gabor schrieb:

> I'm seeing some strange behavior when trying to program
> a Spartan 2e (XC2S150E) directly via JTAG.  In the system
> it is normally programmed using master serial mode from
> the XCF02S "platform flash" part.  The JTAG chain starts
> with the XCF02S and then ends at the XC2S150E - no
> other parts.  I can program the XCF02S without problem
> using JTAG.  I can also program the XC2S150E without
> problems via JTAG _IF_ the XCF02S is blank.  Once the
> FPGA has been programmed from the XCF02S using
> master serial mode, which is the normal case after
> power-up, attempts to re-program the FPGA using JTAG
> fail.  This does not seem to be a problem with the
> FPGA running.  I can re-program the FPGA via JTAG
> when it is running _IF_ the FPGA was originally configured
> via JTAG.  I have opened a web case on this, but I thought
> someone here may have some insight on this issue.  I
> saw in an old thread the following note:
>
> David Kinsell wrote:
>
> We've seen different problems with an XCF02S in the chain ahead of a
> Spartan 2 part.  Done never goes high on the Spartan when attempting
> JTAG programming.  Take the XCF02 out of the chain and it works.
> Discovered that if the XCF02 is blank, then we can program the Spartan
> OK.  Xilinx has some answer records (18644 and others) on related
> issues, but that didn't seem to apply to us.

this issue can cause problems for different parts, no matter if there
is an Xilinx AR or not

the thing is that if any non-JTAG config interface shifts in valid SYNC
word
during some specifig time in the JTAG config process then the JTAG
configuration will fail.

happens with XCFxx master serial mode, happens with Se3 BPI mode (at
least early silicon)
etc, etc..

so just make sure the config is blank

antti

I'm seeing some strange behavior when trying to program
a Spartan 2e (XC2S150E) directly via JTAG.  In the system
it is normally programmed using master serial mode from
the XCF02S "platform flash" part.  The JTAG chain starts
with the XCF02S and then ends at the XC2S150E - no
other parts.  I can program the XCF02S without problem
using JTAG.  I can also program the XC2S150E without
problems via JTAG _IF_ the XCF02S is blank.  Once the
FPGA has been programmed from the XCF02S using
master serial mode, which is the normal case after
power-up, attempts to re-program the FPGA using JTAG
fail.  This does not seem to be a problem with the
FPGA running.  I can re-program the FPGA via JTAG
when it is running _IF_ the FPGA was originally configured
via JTAG.  I have opened a web case on this, but I thought
someone here may have some insight on this issue.  I
saw in an old thread the following note:

David Kinsell wrote:

We've seen different problems with an XCF02S in the chain ahead of a
Spartan 2 part.  Done never goes high on the Spartan when attempting
JTAG programming.  Take the XCF02 out of the chain and it works.
Discovered that if the XCF02 is blank, then we can program the Spartan
OK.  Xilinx has some answer records (18644 and others) on related
issues, but that didn't seem to apply to us.