Reply by only...@online.ms●December 8, 20062006-12-08
>tentacle (onlyspam@online.ms) wrote:
>
>> I'm trying to use a FPGA to control a flat panel display that has LVDS
>> inputs. Displays try to draw current from active LVDS lines if the power
>> supply of the panel is switched off.
>>
>> That is very harmful for the TFT and sooner or later it gets destroyed.
>>
>> That is why I have to tri-state the LVDS outputs.
>
>Didn't know that
>
>> Every LVDS driver IC on the market has an "output enable" signal. So why
>> shouldn't this be possible with an FPGA?
>
>Well, I know that a lot of Philips TFT panels are driven by a Cyclone II,
>but then again, these Cyclones get their current from the same supply as
>the panel so the TFT can try to draw current until it hurts, but the
>Cyclone will have nothing to give ;-)
>
>Alternatively you could use SSTL2, which basically has the same electrical
>characteristics but is available as a bidirectional IO buffer. Setting OE
>to 0 in this mode would effectively tristate the buffer. Drive strength is
>limited to 15mA though.
>
>Best regards,
>
>Ben
Hi,
thanks for the tip. I wrote my own serializer IP which uses the DDIOs as output stages and
tristating the buffer works fine.
Best regards,
Simon
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