Hi,

I want to use the Atera “FFT MegaCore Function” in a Design created with 
Mentor FPGA Advantage 7.2.
Importing the created Files in HDL Designer is no Problem, but when I 
try to run Synthesis with the integrated Plugin “Quartus II Synthesis 
Flow” Quartus shows this Error:
Error (10481): VHDL Use Clause error at fft.vhd(35): design library 
"fft_lib" does not contain primary unit "fft_pack" File:
Z:/hds_scratch/FFT/hdl/fft.vhd Line: 35

I think the problem is that Quartus can’t find the library-files which 
belong to this MegaCore.
A direct in Quartus generated Design worked well. I found out, in 
difference to the direct generatet Project, the Quarts Project Files 
created by the HDL Designer Pulgin don’t contain “fft_pack.vhd” at 
“Device Design Files”.

Is it possible to add this per-compiled File to the HDL Designer that it 
is included by the Synthesis Plugin?