Reply by Thomas Rudloff●December 24, 20072007-12-24
HenktenBakker wrote:
> I'd also be interested in a WORKING example of the DDR SDRAM on this
> board.
> I asked this quastion already and had been pointed to examples allrady
> too - but no success so far.
I guess you did not have any success at all. I bought a board from
Digi-Key and started development for an audio project.
When I messured my SDRAM clock, I saw that someone already soldered on
that board. Looks like someone tried to get it to work and gave up and
returned the board. That I finally got.
The high level on my clock line is only 2V unloaded. My almost 150MHz
clock has a DC level of only 0.8V instead of the required 1.25V. This
propably will not trigger the SDRAM at all. The levels on the address
lines look ok on the first view.
I will do some more investigations. It looks like two 100Ohm pullups
will give correct clock levels. What happened? Did they forget a VCCIO
pin or does the chip have a flaw?
I have a rev. D board with a -6T SDRAM chip on it.
Reply by HenktenBakker●December 20, 20072007-12-20
I'd also be interested in a WORKING example of the DDR SDRAM on this
board.
I asked this quastion already and had been pointed to examples allrady
too - but no success so far.
Reply by Alex Freed●December 5, 20072007-12-05
ghelbig@lycos.com wrote:
>
> I've found that www.xilinx.com is an excellent resource for Spartan
> FPGA questions.
>
Did I miss it? Which one? The Microblaze based designs don't work
for me as I don't have it.
>
> G.
-Alex.
Reply by ●December 5, 20072007-12-05
On Dec 5, 3:24 am, Alex Freed <al...@mirrow.com> wrote:
> I'm planning to use Spartan 3e and SDRAM for a product - sort of a
> simple video "card" for an embedded CPU system.
>
> I got myself the Spartan 3e STARTER kit and I'm trying to use the SDRAM
> on board. Found the MIG 1.6 and the pre-configured "bl2cl2" set of
> files. Got them to synthesize by editing a full (wrong for me) path to
> "params" file. So far so good. Changed the UCF to use the 50 MHz clock
> rather than the external one. The resulting bit file loads and does
> *something*. At least there are pulses on "data valid" LED.
>
> I may get somewhere if I continue on this path but it will take me a
> long time to figure out how this core works.
>
> I wonder if anyone knows of an existing design that uses SDRAM on this
> board interfaced to something: soft CPU, video generator, etc.
>
> Thanks.
>
> -Alex.
I've found that www.xilinx.com is an excellent resource for Spartan
FPGA questions.
There's a design that uses the board's DRAM here:
<http://www.xilinx.com/products/boards/s3estarter/
reference_designs.htm>
G.
Reply by Alex Freed●December 5, 20072007-12-05
I'm planning to use Spartan 3e and SDRAM for a product - sort of a
simple video "card" for an embedded CPU system.
I got myself the Spartan 3e STARTER kit and I'm trying to use the SDRAM
on board. Found the MIG 1.6 and the pre-configured "bl2cl2" set of
files. Got them to synthesize by editing a full (wrong for me) path to
"params" file. So far so good. Changed the UCF to use the 50 MHz clock
rather than the external one. The resulting bit file loads and does
*something*. At least there are pulses on "data valid" LED.
I may get somewhere if I continue on this path but it will take me a
long time to figure out how this core works.
I wonder if anyone knows of an existing design that uses SDRAM on this
board interfaced to something: soft CPU, video generator, etc.
Thanks.
-Alex.