Thanks for your advice. Both give me the opportunity to continue to
seek a solution
Reply by morphiend●March 6, 20082008-03-06
On Mar 6, 7:40 am, Pablo <pbantu...@gmail.com> wrote:
> Hi, I have written already about this topic. At finally I have
> configured a DDR SDRAM core for PowerPC so I could read and write from/
> to DDR. It supports words, half words and bytes. I have probed it with
> Xilinx TestMemory and Mwr/Mrd in xmdstub. Everything works fine and I
> could use this memory for my programs.
>
> The problem is that my programs have growed a lot and now I have to
> download the executable.elf to the DDR via xmdstub. When I do it, the
> program doesn't work. I have disassemble the executable.elf and run
> the program step by step. The problem is that certain number of
> assemble code doesn't work as I need.
>
> I have probed to download only the code belongs to my program, so
> "boot.o", "cpu_init.o",... , resides at bram. But when PC pointer
> arrives to my program at DDR, then it fails again.
>
> I know that this situation is very strange, but I could not use xilinx
> ddr cores because my custom board has another type of configuration.
>
> Any advice?
>
> Thanks a lot for your help.
Make sure you have the IPLB of the PPC connected to the PLB that your
memory controller resides on.
Being able to access the data side is completely seperate from the
instruction side, from the processor's point of view.
Reply by Gabor●March 6, 20082008-03-06
On Mar 6, 7:40 am, Pablo <pbantu...@gmail.com> wrote:
> Hi, I have written already about this topic. At finally I have
> configured a DDR SDRAM core for PowerPC so I could read and write from/
> to DDR. It supports words, half words and bytes. I have probed it with
> Xilinx TestMemory and Mwr/Mrd in xmdstub. Everything works fine and I
> could use this memory for my programs.
>
> The problem is that my programs have growed a lot and now I have to
> download the executable.elf to the DDR via xmdstub. When I do it, the
> program doesn't work. I have disassemble the executable.elf and run
> the program step by step. The problem is that certain number of
> assemble code doesn't work as I need.
>
> I have probed to download only the code belongs to my program, so
> "boot.o", "cpu_init.o",... , resides at bram. But when PC pointer
> arrives to my program at DDR, then it fails again.
>
> I know that this situation is very strange, but I could not use xilinx
> ddr cores because my custom board has another type of configuration.
>
> Any advice?
>
> Thanks a lot for your help.
I would start by trying to find out what types of memory
cycles might happen during program execution that were not
tested by TestMemory etc.
Some possibilities:
TestMemory does not overlap banks while program execution does.
TestMemory is not dependent on burst order/length while program
execution is.
Any possibility of fitting ChipScope into your design and
looking at the DDR activity when it fails (assuming you
can figure out what to trigger on)?
That's all I can think of at the moment.
Regards,
Gabor
Reply by Pablo●March 6, 20082008-03-06
Hi, I have written already about this topic. At finally I have
configured a DDR SDRAM core for PowerPC so I could read and write from/
to DDR. It supports words, half words and bytes. I have probed it with
Xilinx TestMemory and Mwr/Mrd in xmdstub. Everything works fine and I
could use this memory for my programs.
The problem is that my programs have growed a lot and now I have to
download the executable.elf to the DDR via xmdstub. When I do it, the
program doesn't work. I have disassemble the executable.elf and run
the program step by step. The problem is that certain number of
assemble code doesn't work as I need.
I have probed to download only the code belongs to my program, so
"boot.o", "cpu_init.o",... , resides at bram. But when PC pointer
arrives to my program at DDR, then it fails again.
I know that this situation is very strange, but I could not use xilinx
ddr cores because my custom board has another type of configuration.
Any advice?
Thanks a lot for your help.