Peter Alfke wrote:

(in answer to a question about a clockless UART)

> Simple answer: You cannot. You can of course generate your own clock...

Someone I know used to have a paper tape reader that you would
pull the tape through by hand.  A row of phototransistors and LEDs
would sense the holes as they went by, including the row of clock
holes.

I had wondered about making a card reader using a similar design,
but there are no clock holes.  It would be necessary to either run
the card at a constant speed, or otherwise measure the speed or
position of the card.  A rubber wheel and phototransistor/LED
sensor to read its position should be enough.

Paper tape is self clocking but punched cards are not.

-- glen

shashi22k@rediffmail.com (Shashi) wrote in message news:<7cdabebf.0404201535.de4bbe8@posting.google.com>...
> Hi,
> I'm doing a project in clockless uart..as u know that the primary
> function of uart is parallel to serial conversion while transmitting
> and serial to paralel conversion while receiving..I was wondering if
> someone could tell me as how can i do a parallel to serial conversion
> and vice versa without using a clock.
> 
> Thank You
> SHASHI


Say...  Do you mean an "asynchronous" UART?  You *do* have a system
clock available to the FPGA, right?  Something in the MHz range?

What about human speech? (Sometimes I wish XON/XOFF worked with the missus!)
Are brains synchronous? I wish mine was, maybe then it would work a little
more reliably...
cheers, Syms.
"Simon Peacock" <nowhere@to.be.found> wrote in message
news:408771b3@news.actrix.gen.nz...
> is a UART.  All comms is synchronous or synchronised. (unless its simply
on
> and off!)
>
> Simon
>

Simon Peacock wrote:
> I would agree ... and stand corrected ... but can you always think of the
> right words ... :-)
> 
> But I did point out that you re-sync...  that implies something... and I
> believe the delayed shift register (mentioned in this thread) has already
> been done but that also requires a clock.
> and so I think most people have seen an "AT" modem.. re auto baud.. Hayes
> and stuff like that .. even they have clocks.  FPGA's are synchronous.. so
> is a UART.  All comms is synchronous or synchronised. (unless its simply on
> and off!)

It becomes an exercise in semantics :
  Uarts require triggered, time interval sampling.
  You _can_ build a uart without an external, precision, always on clock 
source. To some, that qualifies as 'not using a clock'.
  Others might say any digital-divider must have a register, and that 
register must be clocked, so all registers are verboten in a purists
'Clockless uart'.
  That design can be done with a delay line ( which needs baud-precision 
- not really a common building block...),
plus it's not clear how it would manage sync in packed streaming data...

  Complex Async ICs design is not truly clockless, but it can be
self-timing, and not locked to a common bus'd clock.

  The OP's question sounded rather like homework, than any real problem
needing a practical solution....
-jg

I would agree ... and stand corrected ... but can you always think of the
right words ... :-)

But I did point out that you re-sync...  that implies something... and I
believe the delayed shift register (mentioned in this thread) has already
been done but that also requires a clock.
and so I think most people have seen an "AT" modem.. re auto baud.. Hayes
and stuff like that .. even they have clocks.  FPGA's are synchronous.. so
is a UART.  All comms is synchronous or synchronised. (unless its simply on
and off!)

Simon

"Peter Alfke" <peter@xilinx.com> wrote in message
news:BCABF216.5FA4%peter@xilinx.com...
> I would call that self-synchronizing, not self-clocking.
> Manchester code is self-clocking, provided you get it going "on the right
> foot".
> Peter Alfke
>
> > From: "Simon Peacock" <nowhere@to.be.found>
> > Organization: TelstraClear
> > Newsgroups: comp.arch.fpga
> > Date: Wed, 21 Apr 2004 20:31:28 +1200
> > Subject: Re: Issues on Shift Register in a  Clockless UART
> >
> > it should perhaps be pointed out that UART's aren't in fact clockless..
they
> > are self clocking... that is the clock is passed with the data (i.e. the
> > leading edge of the start bit is the re-syncing edge)
> >
> > Simon
> >
> >
> > "Peter Alfke" <peter@xilinx.com> wrote in message
> > news:BCAB2209.5F87%peter@xilinx.com...
> >> Simple answer: You cannot. You can of course generate your own clock...
> >> Peter Alfke
> >>
> >>> From: shashi22k@rediffmail.com (Shashi)
> >>> Organization: http://groups.google.com
> >>> Newsgroups: comp.arch.fpga
> >>> Date: 20 Apr 2004 16:35:16 -0700
> >>> Subject: Issues on Shift Register in a  Clockless UART
> >>>
> >>> Hi,
> >>> I'm doing a project in clockless uart..as u know that the primary
> >>> function of uart is parallel to serial conversion while transmitting
> >>> and serial to paralel conversion while receiving..I was wondering if
> >>> someone could tell me as how can i do a parallel to serial conversion
> >>> and vice versa without using a clock.
> >>>
> >>> Thank You
> >>> SHASHI
> >>
> >
> >
>

I would call that self-synchronizing, not self-clocking.
Manchester code is self-clocking, provided you get it going "on the right
foot".
Peter Alfke

> From: "Simon Peacock" <nowhere@to.be.found>
> Organization: TelstraClear
> Newsgroups: comp.arch.fpga
> Date: Wed, 21 Apr 2004 20:31:28 +1200
> Subject: Re: Issues on Shift Register in a  Clockless UART
> 
> it should perhaps be pointed out that UART's aren't in fact clockless.. they
> are self clocking... that is the clock is passed with the data (i.e. the
> leading edge of the start bit is the re-syncing edge)
> 
> Simon
> 
> 
> "Peter Alfke" <peter@xilinx.com> wrote in message
> news:BCAB2209.5F87%peter@xilinx.com...
>> Simple answer: You cannot. You can of course generate your own clock...
>> Peter Alfke
>> 
>>> From: shashi22k@rediffmail.com (Shashi)
>>> Organization: http://groups.google.com
>>> Newsgroups: comp.arch.fpga
>>> Date: 20 Apr 2004 16:35:16 -0700
>>> Subject: Issues on Shift Register in a  Clockless UART
>>> 
>>> Hi,
>>> I'm doing a project in clockless uart..as u know that the primary
>>> function of uart is parallel to serial conversion while transmitting
>>> and serial to paralel conversion while receiving..I was wondering if
>>> someone could tell me as how can i do a parallel to serial conversion
>>> and vice versa without using a clock.
>>> 
>>> Thank You
>>> SHASHI
>> 
> 
> 

"rickman" <spamgoeshere4@yahoo.com> wrote in message
news:4086954D.FDCD1100@yahoo.com...
> But this is not "clockless".  If the OP really means a UART using *no*
> clock, I don't see how this can be done.  Sequential logic can be made
> that does not require a clock, but a UART must have a clock to measure
> time.  The UART data format provides information on the timing of the
> start of a word, but you still need a clock to measure the bit times.
>
> -- 
>
> Rick "rickman" Collins

You could have a huge delay line with taps spaced at the center of each bit
period. Latch the taps' output with the stop bit. I'll get me coat....
Cheers, Syms.

Jim Granville wrote:
> 
> Simon Peacock wrote:
> > it should perhaps be pointed out that UART's aren't in fact clockless.. they
> > are self clocking... that is the clock is passed with the data (i.e. the
> > leading edge of the start bit is the re-syncing edge)
> 
>   The LIN Bus takes this a step further, in that a BAUD rate is not
> assumed, but they send a known preamble byte (55H or AAH IFW), and
> that allows 'floor sweepings grade' uC / RC osc to autobaud.
> 
>   No reason the same ideas could not be used on a FPGA.
> 
>   You would start a low precision burst oscillator on the leading edge,
> calculate your AutoBAUD divisor on the first byte, and run
> until a known stop char/count, then go back to clockless-sleep.
> 
>   Rather high baud rates would seem to be possible...

But this is not "clockless".  If the OP really means a UART using *no*
clock, I don't see how this can be done.  Sequential logic can be made
that does not require a clock, but a UART must have a clock to measure
time.  The UART data format provides information on the timing of the
start of a word, but you still need a clock to measure the bit times.  

-- 

Rick "rickman" Collins

rick.collins@XYarius.com
Ignore the reply address. To email me use the above address with the XY
removed.

Arius - A Signal Processing Solutions Company
Specializing in DSP and FPGA design      URL http://www.arius.com
4 King Ave                               301-682-7772 Voice
Frederick, MD 21701-3110                 301-682-7666 FAX

Simon Peacock wrote:
> it should perhaps be pointed out that UART's aren't in fact clockless.. they
> are self clocking... that is the clock is passed with the data (i.e. the
> leading edge of the start bit is the re-syncing edge)

  The LIN Bus takes this a step further, in that a BAUD rate is not 
assumed, but they send a known preamble byte (55H or AAH IFW), and
that allows 'floor sweepings grade' uC / RC osc to autobaud.

  No reason the same ideas could not be used on a FPGA.

  You would start a low precision burst oscillator on the leading edge, 
calculate your AutoBAUD divisor on the first byte, and run
until a known stop char/count, then go back to clockless-sleep.

  Rather high baud rates would seem to be possible...
-jg

it should perhaps be pointed out that UART's aren't in fact clockless.. they
are self clocking... that is the clock is passed with the data (i.e. the
leading edge of the start bit is the re-syncing edge)

Simon


"Peter Alfke" <peter@xilinx.com> wrote in message
news:BCAB2209.5F87%peter@xilinx.com...
> Simple answer: You cannot. You can of course generate your own clock...
> Peter Alfke
>
> > From: shashi22k@rediffmail.com (Shashi)
> > Organization: http://groups.google.com
> > Newsgroups: comp.arch.fpga
> > Date: 20 Apr 2004 16:35:16 -0700
> > Subject: Issues on Shift Register in a  Clockless UART
> >
> > Hi,
> > I'm doing a project in clockless uart..as u know that the primary
> > function of uart is parallel to serial conversion while transmitting
> > and serial to paralel conversion while receiving..I was wondering if
> > someone could tell me as how can i do a parallel to serial conversion
> > and vice versa without using a clock.
> >
> > Thank You
> > SHASHI
>