On Jun 29, 8:30=A0pm, John_H <newsgr...@johnhandwork.com> wrote:
> On Jun 29, 2:38=A0pm, "sharath20284"
>
>
>
> <sharath20284@n_o_s_p_a_m.yahoo.com> wrote:
> > Hello,
>
> > I am not sure if this post is in the right place - I hope to get some h=
elp
>
> > I am looking for a PCI/e based FPGA solution - The board should be able=
 to
> > support LVDS with 2 RJ45 i/o ports which connect to CAT5 cables. I plan=
 to
> > implement SPI signal on the FPGA and send the generated signal over LVD=
S.
>
> > I am looking for a hardware solution for this. Can you please point to =
me
> > viable options, and where I can find these? I am looking for solutions =
with
> > PCI/e drivers and API which reduce my implementation time.
>
> > thanks,
> > Sharath
>
> > --------------------------------------- =A0 =A0 =A0 =A0
> > Posted throughhttp://www.FPGARelated.com
>
> Because SPI is amazingly slow (compared to LVDS-capable speeds) I'd
> suggest buying a generic PCI/e development board that would otherwise
> fit the bill then wire up your own RJ45s. =A0There's no majic to having
> an "amazing" connection with SPI since it's such a lethargic
> communication method.


That's probably not a bad idea, but don't consider SPI to be trivial
to implement just because the data rate is not high.  SPI has no spec
and is often implemented at up to 10 MHz data rates.  You need to be
aware of edge effects, especially on the clock line.  LVDS is not a
bad idea, but it requires special attention to matching delays in
order for the edges to arrive at the same time to avoid glitches.

Rick

On Jun 29, 2:38=A0pm, "sharath20284"
<sharath20284@n_o_s_p_a_m.yahoo.com> wrote:
> Hello,
>
> I am not sure if this post is in the right place - I hope to get some hel=
p
>
> I am looking for a PCI/e based FPGA solution - The board should be able t=
o
> support LVDS with 2 RJ45 i/o ports which connect to CAT5 cables. I plan t=
o
> implement SPI signal on the FPGA and send the generated signal over LVDS.
>
> I am looking for a hardware solution for this. Can you please point to me
> viable options, and where I can find these? I am looking for solutions wi=
th
> PCI/e drivers and API which reduce my implementation time.
>
> thanks,
> Sharath
>
> --------------------------------------- =A0 =A0 =A0 =A0
> Posted throughhttp://www.FPGARelated.com

Because SPI is amazingly slow (compared to LVDS-capable speeds) I'd
suggest buying a generic PCI/e development board that would otherwise
fit the bill then wire up your own RJ45s.  There's no majic to having
an "amazing" connection with SPI since it's such a lethargic
communication method.

Good luck.

Hello,

I am not sure if this post is in the right place - I hope to get some help

I am looking for a PCI/e based FPGA solution - The board should be able to
support LVDS with 2 RJ45 i/o ports which connect to CAT5 cables. I plan to
implement SPI signal on the FPGA and send the generated signal over LVDS.

I am looking for a hardware solution for this. Can you please point to me
viable options, and where I can find these? I am looking for solutions with
PCI/e drivers and API which reduce my implementation time.

thanks,
Sharath

	   
					
---------------------------------------		
Posted through http://www.FPGARelated.com