Reply by Ulf Samuelsson October 9, 20102010-10-09
rickman skrev:
> On Oct 5, 1:36 am, Eric Smith <space...@gmail.com> wrote: >> rickman wrote: >>> The Xilinx/ARM announcement may end up being much more interesting, >> I'm not sure why to expect it to be any more interesting than the >> Altera/ARM stuff was, or for that matter, the Xilinx/IBM stuff. As >> in, not very interesting at all. >> >> Eric > > Why was the Altera/ARM stuff not interesting? It failed because it > was so expensive, in my opinion. I expect we'll never find out from > Altera. The Actel Fusion part is also a bit pricey. You forgot to > mention the Atmel FPSLIC part (Atmel FPGA/AVR). I'm not sure if that > is still around, but it has become inconsequential because of the > price and the lack of advancement of the development tools.
The FPSLIC is still in production, but since no shrink has been made, there is no long term migration path. Many of people working with the FPSLIC left and started at Actel, so mayube the Fusion stuff is really FPSLIC-2... It certainly addresses many of the concerns of the FPSLIC. 1) No Analog 2) No Flash 3) VERY limited code space (32kB max) I have seen what appears to be the perfect application for the Fusion, and it can be solved at 50% of the Fusion cost using 2 micros. If you want mixed signal CPU/FPGA devices, then you have to use the same processes as the standard micros. This makes the part too expensive. If you want to go for low cost, you go real aggressive pure digital CMOS and have to use external memory, or large SRAMs. Most companies I see that is looking for 32 bit MCUs require 256 kB - 1 MB code memory, which has to be implemented as SRAM on the chip, if you do not have a flash capable process. I think that you either have to go for application processors like ARM9 or above, or limit the FPGA to a small part of the chip for the cost to be acceptable. One problem that you face when you design such a chip, is that you need to make a family, for people to accept. You have memory size in one dimension and FPGA size in another dimension. If you have 4 different memory sizes and 3 different FPGA sizes, you will have to create 12 different masksets. This will be very expensive in 28 nm...
> > The Xilinx/ARM stuff might be interesting if they actually tap the > full potential of providing a range of products to match the range of > CPUs that are available from ARM. If Xilinx just repeats what they > did with the PPC and just makes one limited line of devices then I > don't see that being especially successful either. > > Actually, I shouldn't say that. Knowing Xilinx, I expect they will > identify the markets with the most potential and design a small number > of FPGA/ARM devices tailored to those apps. One might be cell > phones. That is a potentially HUGE market and SiBlue is currently > trying to break into that area. If Xilinx combines an ARM with a low > end FPGA like the SiBlue parts, they could beat them at their own > game. Or perhaps a larger FPGA (if it is cheap enough and low power > enough) could replace some of the custom logic in a cell phone? But > mostly, Xilinx understands their core market, network comms. For them > a large FPGA combined with one or more high end ARM cores (a la Virtex- > II Pro) is what we can expect. > > If you were combining an FPGA with a CPU in a market where a number of > companies were doing that, how would you differentiate your product? > > Rick
Best Regards Ulf Samuelsson
Reply by dalai lamah October 5, 20102010-10-05
Un bel giorno rickman digit&#4294967295;:

> I had not heard of the Intel/Altera union. That appears to be > oriented to creating a device that can be responsive to rapidly > changing I/O requires of the market.
I think it's more likely that they are looking for a way to crunch numbers faster and close the gap with GPUs: http://blogs.nvidia.com/ntersect/2010/06/gpus-are-only-up-to-14-times-faster-than-cpus-says-intel.html -- emboliaschizoide.splinder.com
Reply by rickman October 5, 20102010-10-05
On Oct 5, 1:36=A0am, Eric Smith <space...@gmail.com> wrote:
> rickman wrote: > > The Xilinx/ARM announcement may end up being much more interesting, > > I'm not sure why to expect it to be any more interesting than the > Altera/ARM stuff was, or for that matter, the Xilinx/IBM stuff. =A0As > in, not very interesting at all. > > Eric
Why was the Altera/ARM stuff not interesting? It failed because it was so expensive, in my opinion. I expect we'll never find out from Altera. The Actel Fusion part is also a bit pricey. You forgot to mention the Atmel FPSLIC part (Atmel FPGA/AVR). I'm not sure if that is still around, but it has become inconsequential because of the price and the lack of advancement of the development tools. The Xilinx/ARM stuff might be interesting if they actually tap the full potential of providing a range of products to match the range of CPUs that are available from ARM. If Xilinx just repeats what they did with the PPC and just makes one limited line of devices then I don't see that being especially successful either. Actually, I shouldn't say that. Knowing Xilinx, I expect they will identify the markets with the most potential and design a small number of FPGA/ARM devices tailored to those apps. One might be cell phones. That is a potentially HUGE market and SiBlue is currently trying to break into that area. If Xilinx combines an ARM with a low end FPGA like the SiBlue parts, they could beat them at their own game. Or perhaps a larger FPGA (if it is cheap enough and low power enough) could replace some of the custom logic in a cell phone? But mostly, Xilinx understands their core market, network comms. For them a large FPGA combined with one or more high end ARM cores (a la Virtex- II Pro) is what we can expect. If you were combining an FPGA with a CPU in a market where a number of companies were doing that, how would you differentiate your product? Rick
Reply by Eric Smith October 5, 20102010-10-05
rickman wrote:
> The Xilinx/ARM announcement may end up being much more interesting,
I'm not sure why to expect it to be any more interesting than the Altera/ARM stuff was, or for that matter, the Xilinx/IBM stuff. As in, not very interesting at all. Eric
Reply by rickman October 4, 20102010-10-04
On Oct 4, 6:01=A0pm, John Blyler <john.bly...@gmail.com> wrote:
> Three weeks ago, Intel announced the mid-year 2011 availability of the > first programmable embedded ATOM SoC =96 codenamed Stellarton =96 based o=
n
> Altera=92s FPGA technology. Earlier this year, Xilinx announced a > partnership with ARM, the current de facto leader in embedded mobile > systems. Both of these announcements were processor-centric, i.e., an > embedded processor was tightly couple to an FPGA. (See =93Intel Teams Up > with Altera=94) > > This is not the case with today=92s announcement of Microsemi=92s > acquisition of FPGA tool vendor Actel. Rather than a marriage of > processors with FPGAs, this announcement represents a union of analog- > mixed signal (AMS) and RF/Wireless chips with FPGAs. Why the > difference? > > http://www.chipdesignmag.com/blyler/2010/10/04/why-did-microsemi-buy-...
Microsemi may have a leg up with a few Wifi like chips which could be integrated with the Actel SOC devices. I am sure there are markets for many combinations of these devices. I wonder where the next killer app will come from. I had not heard of the Intel/Altera union. That appears to be oriented to creating a device that can be responsive to rapidly changing I/O requires of the market. It can also allow a single hardware device to address many smaller markets rather than requiring a separate chip for each. But what exactly are those markets? Currently the Atom processor is a bit "heavy" for truly portable apps such as cell phones and devices of similar size. I expect it is even too much for PDAs. The Xilinx/ARM announcement may end up being much more interesting, potentially combining a range of processors and a range of FPGAs on a single die. There is a virtually unlimited range of markets for such devices. Being on a single die will greatly lower the cost and size. But all of this is far out and we can only wait for more details. I expect chips will not be in our hands for years to come. Rick
Reply by John Blyler October 4, 20102010-10-04
Three weeks ago, Intel announced the mid-year 2011 availability of the
first programmable embedded ATOM SoC =96 codenamed Stellarton =96 based on
Altera=92s FPGA technology. Earlier this year, Xilinx announced a
partnership with ARM, the current de facto leader in embedded mobile
systems. Both of these announcements were processor-centric, i.e., an
embedded processor was tightly couple to an FPGA. (See =93Intel Teams Up
with Altera=94)

This is not the case with today=92s announcement of Microsemi=92s
acquisition of FPGA tool vendor Actel. Rather than a marriage of
processors with FPGAs, this announcement represents a union of analog-
mixed signal (AMS) and RF/Wireless chips with FPGAs. Why the
difference?

http://www.chipdesignmag.com/blyler/2010/10/04/why-did-microsemi-buy-actel/