Reply by John Adair October 11, 20102010-10-11
Basically yes you can do this in a Spartan-6. The I/O will run this
fast. You probably want to either use the DDR or serdes features at
the I/O to drop the internal data rates down to 150MHz or lower but
that would probably work well for what you are doing.

Now the product plug. You can try this on any of our range of
Spartan-6 development boards http://www.enterpoint.co.uk/boardproducts.html=
.
we have significant support for LVDS in all of these.

John Adair
Enterpoint Ltd.

On 11 Oct, 08:57, Indie Tinde <indieti...@gmail.com> wrote:
> I'm new in FPGA field, so i have a problem.... > I need a low cost FPGA able to drive a sensor with > > 5 LVDS DDR data sensor->FPGA > 1 LVDS Clock at 300MHz sensor->FPGA > 1 LVDS Clock at 300Mhz FPGA->sensor > SPI FPGA->sensor > > in sensor evaluation board, a Virtex5 XC5VLX50T-1FFG1136C is used. I > need a low cost fpga, so i thought about Spartan6 family (for example > XC6SLX150T-3FGG676C). What do you think? Is it possible to obtain a > 300MHz clock =A0output from a differential IO? Any suggestion? > Thanks in advance
Reply by Indie Tinde October 11, 20102010-10-11
On 11 Ott, 10:42, "Michael Kellett" <nos...@nospam.com> wrote:
> "Indie Tinde" <indieti...@gmail.com> wrote in message > > news:f3b6b185-465d-487f-9bf9-4d4c57680a2d@c21g2000vba.googlegroups.com... > > > I'm new in FPGA field, so i have a problem.... > > I need a low cost FPGA able to drive a sensor with > > > 5 LVDS DDR data sensor->FPGA > > 1 LVDS Clock at 300MHz sensor->FPGA > > 1 LVDS Clock at 300Mhz FPGA->sensor > > SPI FPGA->sensor > > > in sensor evaluation board, a Virtex5 XC5VLX50T-1FFG1136C is used. I > > need a low cost fpga, so i thought about Spartan6 family (for example > > XC6SLX150T-3FGG676C). What do you think? Is it possible to obtain a > > 300MHz clock =A0output from a differential IO? Any suggestion? > > Thanks in advance > > Look at Lattice XP3 - might be cheaper. Whatever you use other than just > cloning the eval board will be hard work.
Thanks for infos, i'll take a look...you're right, but i think could be an harder work if i use an fpga of another factory with another ise,ecc...Virtex5 is expensive, so i look for Virtex6 or Spartan6 (more cheaper), but i'm not really sure that a Spartan6 can be used with this sensor..any help?
Reply by Michael Kellett October 11, 20102010-10-11
"Indie Tinde" <indietinde@gmail.com> wrote in message 
news:f3b6b185-465d-487f-9bf9-4d4c57680a2d@c21g2000vba.googlegroups.com...
> I'm new in FPGA field, so i have a problem.... > I need a low cost FPGA able to drive a sensor with > > 5 LVDS DDR data sensor->FPGA > 1 LVDS Clock at 300MHz sensor->FPGA > 1 LVDS Clock at 300Mhz FPGA->sensor > SPI FPGA->sensor > > in sensor evaluation board, a Virtex5 XC5VLX50T-1FFG1136C is used. I > need a low cost fpga, so i thought about Spartan6 family (for example > XC6SLX150T-3FGG676C). What do you think? Is it possible to obtain a > 300MHz clock output from a differential IO? Any suggestion? > Thanks in advance
Look at Lattice XP3 - might be cheaper. Whatever you use other than just cloning the eval board will be hard work. Michael Kellett
Reply by Indie Tinde October 11, 20102010-10-11
I'm new in FPGA field, so i have a problem....
I need a low cost FPGA able to drive a sensor with

5 LVDS DDR data sensor->FPGA
1 LVDS Clock at 300MHz sensor->FPGA
1 LVDS Clock at 300Mhz FPGA->sensor
SPI FPGA->sensor

in sensor evaluation board, a Virtex5 XC5VLX50T-1FFG1136C is used. I
need a low cost fpga, so i thought about Spartan6 family (for example
XC6SLX150T-3FGG676C). What do you think? Is it possible to obtain a
300MHz clock  output from a differential IO? Any suggestion?
Thanks in advance