On 11 Okt., 14:24, "Mile" <skymoon_h2s@n_o_s_p_a_m.hotmail.com> wrote:
> Hello All,
>
> I am new in this forum.
> I would like to ask if there is a way to calculate the SFDR in FPGA.
> I have limited resources in the FPGA, so calculating the FFT is not so
> preferable.

If you know the input frequency, it is extremely likely that one of
the first harmonics is the biggest spur.
You can use a few sine generators to calculate the fourier
coefficients only for these frequencies.
(also note, that sin(x)*sin(x) = sin(2x), so you need less generators
than you are evaluating frequencies...)

If you can spare the time needed and the input signal is stable, you
can also sweep the sine generator and compute all fourier coefficients
sequentially.


Kolja
cronologic.de

On Oct 11, 7:24=A0am, "Mile" <skymoon_h2s@n_o_s_p_a_m.hotmail.com>
wrote:
> Hello All,
>
> I am new in this forum.
> I would like to ask if there is a way to calculate the SFDR in FPGA.
> I have limited resources in the FPGA, so calculating the FFT is not so
> preferable.
> knowing that my bandwidth is around 1.5 GHz.
>
> my main goal is to evaluate the ADC, SFDR specifically.
>
> any idea is appreciated.
>
> Mile
>
> --------------------------------------- =A0 =A0 =A0 =A0
> Posted throughhttp://www.FPGARelated.com

First, a couple of questions:

1) What are your test conditions?
2) Do you really have a bandwidth of 1.5 GHz? If so, how will you
process that much BW in an FPGA?

Seems to me that you should just find a way to capture the ADC samples
and post process them using a standard software tool (e.g., Matlab).

Also, you should post your question to comp.dsp.

Darol Klawetter

Hello All,

I am new in this forum. 
I would like to ask if there is a way to calculate the SFDR in FPGA. 
I have limited resources in the FPGA, so calculating the FFT is not so
preferable. 
knowing that my bandwidth is around 1.5 GHz. 

my main goal is to evaluate the ADC, SFDR specifically. 

any idea is appreciated. 

Mile



	   
					
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