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DSPEmbedded Systems

Welcome to FPGARelated.com !

FPGARelated.com has been around since 2006 and has become over the years a very popular resource for Field-programmable gate array (FPGA) experts around the world.

You are invited to create an account with us (quick and free). Doing so will allow you to participate to the comp.arch.fpga usenet group, to rate fpga books, internet resources and blogs.

FPGA Blogs

StrangeCPU #4. Microcode
posted by Victor Yurkovsky
Comments (2) |

MyHDL Resources
posted by Christopher Felton
Comments (0) |

How to start in FPGA development? - Simulation software tools
posted by Nuria Orduna
Comments (7) |

An Editor for HDLs
posted by Dave Vandenbout
Comments (8) |

Designing a FPGA Micro Pt2 - Clock and Counter build and test.
posted by Paul J Clarke
Comments (0) |

FPGA or DSP Processor - Parameters to Make the Right Choice
posted by Muhammad Yasir
Comments (2) |

Using GHDL for interactive simulation under Linux
posted by Martin Strubel
Comments (1) |

FPGA Bloggers Needed - New Reward System
posted by Stephane Boucher
Comments (4) |

New Design - Finally!
posted by Stephane Boucher
Comments (3) |

FPGA Books

SystemVerilog for Verification: A Guide to Learning the Testbench Language Features
Chris Spear

Memory Systems: Cache, DRAM, Disk
Bruce Jacob

CMOS VLSI Design: A Circuits and Systems Perspective (3rd Edition)
Neil Weste

VHDL Starter's Guide
Sudhakar Yalamanchili

VHDL Coding Styles and Methodologies
Ben Cohen

VLSI Digital Signal Processing Systems : Design and Implementation
Keshab K. Parhi

FPGAs: Instant Access
Clive Maxfield

Circuit Design with VHDL
Volnei A. Pedroni

Advanced Digital Design with the Verilog(TM) HDL + Xilinx 6.3 Student Edition Package
Michael D. Ciletti

The Designer's Guide to VHDL
Peter J. Ashenden

Comp.Arch.FPGA

XILINX Artix-7 DDR2-RAM-Controller
by Bodo sent on 2013-05-18 11:06:00
Hello, I'm trying to implement a DDR2-RAM-Controller for the ARTIX-7 FPGA and I have some "proble... 

Linting tool setup
by RCIngham sent on 2013-05-16 10:40:00
Greetings all, Further to previous thread(s), has anyone here experience in setting up a linting ... 

Any experience of Equivalence Checking tools?
by RCIngham sent on 2013-05-14 11:23:00
Greetings all, Has anyone hereabouts any experience with the use of Equivalence Checking tools in... 

Modelsim ought to be cheaper
by Kevin Neilson sent on 2013-05-13 10:32:00
Why is Modelsim so expensive? It is a mature product and yet it segfaults = on me all the time. C... 

Inferring Xilinx BlockRAM FIFO
by Kevin Neilson sent on 2013-05-13 09:42:00
The Xilinx built-in blockRAM FIFOs seem pretty nice, but is there any way t= o infer them? Probabl... 

Catapult C floating point exp() function?
by Unknown sent on 2013-05-13 09:40:00
Hello all, I was wondering if catapult C HLS has a built in exp() for floating point numbers. If ... 

Xilinx SDK 14.5 debug
by maxascent sent on 2013-05-11 15:59:00
I have a Microblaze design in SDK that I am trying to debug. I have an IP block with some registers ... 

Low cost and/or small size CPU in an FPGA
by hamilton sent on 2013-05-01 12:54:00
What is the lowest cost and/or the smallest CPU in an FPGA. Can a CPU with reasonable code space ... 

comparing Xilinx XC3S500E-4CPG132C vs Altera Cyclone IV FPGA (EP4CE22F17C6N) apples to apples.
by jleslie48 sent on 2013-04-29 14:54:00
the xilinx says it has 500,000 gates, the altera says it has 22,320 Logic elements (LEs) 594 Em... 

FPGA Development Board with hard PowerPC
by studywireless sent on 2013-04-26 22:01:00
I am working on a channel emulator which is based on a FPGA development board and a custom based RF ... 

Latest Papers, Theses, Articles, etc

Performance driven FPGA design with an ASIC perspective
by Andreas Ehliar |
0

FPGA devices are an important component in many modern devices. This means that it is important that... Performance driven FPGA design with an ASIC perspective
Architectures, Methods, and Tools for Distributed Run-time Reconfigurable FPGA-based Systems
by Dirk Koc |
-3

More than two decades in FPGA evolution have emerged in a multibillion US$ market and devices that a... Architectures, Methods, and Tools for Distributed Run-time Reconfigurable FPGA-based Systems
Implementing video compression algorithms on reconfigurable devices
by Stewart, Graeme |
-1

The increasing density offered by Field Programmable Gate Arrays(FPGA), coupled with their short des... Implementing video compression algorithms on reconfigurable devices
FPGA-based reconfigurable on-board computing systems for space applications
by Toshinori Kuwahar |
-1

The purpose of the thesis is to conceptualize an application method of ground-based reconfigurable F... FPGA-based reconfigurable on-board computing systems for space applications
Security for volatile FPGAs
by Saar Drimer |
-1

With recon gurable devices fast becoming complete systems in their own right, interest in their secu... Security for volatile FPGAs
Numerical Solutions of Differential Equations on FPGA-Enhanced Computers
by Chuan H |
+1

Conventionally, to speed up scientific or engineering (S&E) computation programs on general-purpose ... Numerical Solutions of Differential Equations on FPGA-Enhanced Computers
Memory Reduced and Fast DDS Using FPGA
by Dr. R. K. Sharma |
0

Direct digital synthesis is a method of creating arbitrary waveforms of desired frequency. A general... Memory Reduced and Fast DDS Using FPGA
Physical Synthesis Toolkit for Area and Power Optimization on FPGAs
by Tomasz Sebastian Czajkowski |
+1

A Field-Programmable Gate Array (FPGA) is a configurable platform for implementing a variety of logi... Physical Synthesis Toolkit for Area and Power Optimization on FPGAs