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FPGARelated.com has been around since 2006 and has become over the years a very popular resource for Field-programmable gate array (FPGA) experts around the world.

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Comp.Arch.FPGA

Generating a desired synthesizable binary pulse train on FPGA using VHDL
by chaitanya163 sent on 2014-07-22 17:41:00
Hello Everyone I am new to VHDL programming and FPGA. I have a Virtex - 4 FPGA and I wish to g... 

Help with Address load logic
by Syed Huq sent on 2014-07-16 03:59:00
Hi, I'm trying to implement a trigger with 2 BRAMs with one BRAM storing all th= e data samples ... 

vmWare supporting Avnet Virtex-5 PCIe board
by maverick sent on 2014-07-16 03:15:00
Hi, I am planning to install vmWare on one of my server machines and create virtual servers on it. ... 

Using FPGA as dual ported ram
by Stef sent on 2014-07-15 17:52:00
To interface a fast sampling ADC to a CPU I'm considering to use a fifo or dual ported ram and a sm... 

CFP: EECEA2014 Malaysia
by Hazel Ann sent on 2014-07-15 06:19:00
The International Conference on Electrical, Electronics, Computer Engineering and their Applications... 

CFP: The International Conference on Electrical, Electronics, Computer Engineering and their Applications (EECEA2014) Malaysia
by Hazel Ann sent on 2014-07-15 06:18:00
The International Conference on Electrical, Electronics, Computer Engineering and their Applications... 

wishbone bus between two fpgas
by alb sent on 2014-07-10 13:19:00
Hi everyone, we are in the preliminary phase of the architecture definition for our system and ... 

Perl + Xilinx + commandline = Module::Build::Xilinx
by vicash sent on 2014-07-09 10:53:00
Hello I have released Module::Build::Xilinx (currently at version 0.05) to CPAN. (https://metacpa... 

Linux driver for Xilinx axi_10g_ethernet_0_ten_gig_eth_mac core?
by Unknown sent on 2014-07-08 17:15:00
Hi, I'm looking for the Linux driver for Xilinx 10GBASE-R core. In the DTS it is reported as: ... 

ECP5 support in Latest Diamond 3.2 IDE from Lattice ( 64-bit Linux version) ?
by Brane2 sent on 2014-07-08 12:28:00
I have downloaded latest Diamond and installed it on my Gentoo OS. It works normally except that ... 

Latest Papers, Theses, Articles, etc

Free Range VHDL
by Bryan Mealy |
0

The no-frills guide to writing powerful code for you digital implementations.... Free Range VHDL
The Shock and Awe VHDL Tutorial
by Bryan Mealy |
0

The purpose of this tutorial is to provide students with a guide to help develop the skills necessar... The Shock and Awe VHDL Tutorial
VHDL Tutorial
by Peter J. Ashenden |
0

The purpose of this tutorial is to describe the modeling language VHDL. VHDL includes facilities for... VHDL Tutorial
VHDL handbook
by Hardi Electronics |
0

Introduction to Verilog
by Peter M. Nyasulu |
0

Verilog HDL is one of the two most common Hardware Description Languages (HDL) used by integrated ci... Introduction to Verilog
FPGA Implementation of Digital Filters
by Chi-Jui Chou |
0

Digital Filtering algorithms are most commonly implemented using general purpose digital signal proc... FPGA Implementation of Digital Filters
FPGAs!? Now What?
by Dave Vandenbout |
0

There are numerous requests in Internet forums that go something like this: "I am new to using FPGAs... FPGAs!? Now What?
Architecture of FPGAs and CPLDs: A Tutorial
by Stephen Brown |
0

This paper provides a tutorial survey of architectures of commercially available high-capacity fiel... Architecture of FPGAs and CPLDs: A Tutorial
Performance driven FPGA design with an ASIC perspective
by Andreas Ehliar |
0

FPGA devices are an important component in many modern devices. This means that it is important that... Performance driven FPGA design with an ASIC perspective
Architectures, Methods, and Tools for Distributed Run-time Reconfigurable FPGA-based Systems
by Dirk Koc |
-3

More than two decades in FPGA evolution have emerged in a multibillion US$ market and devices that a... Architectures, Methods, and Tools for Distributed Run-time Reconfigurable FPGA-based Systems