Comp.Arch.FPGA

Compiling a design in Quartus that doesn't fit
by General Schvantzkoph sent on 11:3- -0-10-20
I want to be able to generate an encrypted netlist of a core using Quartus. Does Quartus have a sw... 

Tier Logic introduces the world's first 3D FPGA
by Tier Logic sent on 11:3- -0-10-20
The world's first 3D FPGA has arrived! We have a very compelling and cost effective solution. Co... 

Why doesn't this situation generate a latch?
by Weng Tianxiang sent on 11:3- -0-10-20
Hi, I have a question about when to generate a latch. In Example_1 and Exmaple_2, I don't think ...