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DSPEmbedded Systems

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USB PHY recommendations
by Mike Perkins sent on 2014-10-24 18:21:00
I have started using the TI TUSB1210 which is a USB PHY with a ULPI interface. However, I can... 

[cross-post] verification vs design
by alb sent on 2014-10-24 12:33:00
Hi everyone, I've recently had to argue why it is not 'sane' to budget 500 hours of development... 

Altera 100-pins chip
by Rego sent on 2014-10-23 13:30:00
Hello, I'm looking for suggestions for an Altera 100-pins chip which I can use in a board like th... 

Non-project mode Vivado simulation?
by Unknown sent on 2014-10-23 00:15:00
Is it possible to run a Vivado simulation in non-project mode? I can't seem to find any docu... 

Fast and slow clocks
by Unknown sent on 2014-10-20 12:26:00
I'm wondering what the correct way to handle the following situation is. Sorry this is a bit long w... 

Need ideas for FYP
by Unknown sent on 2014-10-19 21:39:00
I am student of Bachelors and going to start my FYP in some days. I am going into the field of high ... 

looking for systemC/TLM 2.0 courses
by alb sent on 2014-10-18 04:32:00
Hi everyone, I apologize if this is maybe not the best audience for these kind of enquiries but... 

Handel-C to VHDL
by Ahmed Ablak sent on 2014-10-18 04:22:00
When I generate VHDL from Handel-C. I always end up with an empty VHDL file, did any one face this p... 

ISE 14.6 and picoblaze synthesis problem (translate_on/off directives ignored ?)
by sent on 2014-10-14 11:44:00
Hello I am trying to implement a design containing a picoBlaze (source code I hav= e already used ... 

PicoBlaze IDE
by Erik Chalupa sent on 2014-10-14 07:13:00
Hello, we have developed IDE for Xilinx's softcore processor PicoBlaze with features like macro ass... 

Latest Papers, Theses, Articles, etc

Adam Taylor's MicroZed Chronicles
by Adam Taylor |

This is a collection of a number of blogs I have written for the Xilinx Xcell Daily blog on how to u... Adam Taylor's MicroZed Chronicles
Free Range VHDL
by Bryan Mealy |

The no-frills guide to writing powerful code for you digital implementations.... Free Range VHDL
The Shock and Awe VHDL Tutorial
by Bryan Mealy |

The purpose of this tutorial is to provide students with a guide to help develop the skills necessar... The Shock and Awe VHDL Tutorial
VHDL Tutorial
by Peter J. Ashenden |

The purpose of this tutorial is to describe the modeling language VHDL. VHDL includes facilities for... VHDL Tutorial
VHDL handbook
by Hardi Electronics |

Introduction to Verilog
by Peter M. Nyasulu |

Verilog HDL is one of the two most common Hardware Description Languages (HDL) used by integrated ci... Introduction to Verilog
FPGA Implementation of Digital Filters
by Chi-Jui Chou |

Digital Filtering algorithms are most commonly implemented using general purpose digital signal proc... FPGA Implementation of Digital Filters
FPGAs!? Now What?
by Dave Vandenbout |

There are numerous requests in Internet forums that go something like this: "I am new to using FPGAs... FPGAs!? Now What?
Architecture of FPGAs and CPLDs: A Tutorial
by Stephen Brown |

This paper provides a tutorial survey of architectures of commercially available high-capacity fiel... Architecture of FPGAs and CPLDs: A Tutorial
Performance driven FPGA design with an ASIC perspective
by Andreas Ehliar |

FPGA devices are an important component in many modern devices. This means that it is important that... Performance driven FPGA design with an ASIC perspective