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DSPEmbedded Systems

Welcome to ! has been around since 2006 and has become over the years a very popular resource for Field-programmable gate array (FPGA) experts around the world.

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Bypass Xilinx flexlm license check
by Unknown sent on 2014-11-22 23:13:00
Hello, While I certainly do not condone piracy, and I believe Xilinx should be com= pensated for... 

disadvantages of inferring latches
by ronhk25 sent on 2014-11-22 21:06:00
Hi all, I always hear from FPGA designers that latches are "dangerous" and that it'= s very impo... 

What would you say is the best board to buy
by Julian Gardner sent on 2014-11-22 09:56:00
Im looking at a hardware project which will be a DVB-CSA descrambler. Idea is a pci-e board with ... 

Linux USB JTAG Cable Driver for Xilinx Impact
by Ron Aikins sent on 2014-11-21 18:38:00
I've read much on this topic elsewhere, but I'm confused on some things, no= t to mention some of w... 

Program IO 1.2V
by Unknown sent on 2014-11-21 17:41:00
Hi, I would like to create a project with FPGA. You can imagine it as a debug board that need to c... 

CFP: Symposium on Architectures for Networking and Communications Systems (ANCS)
by Eric Keller sent on 2014-11-14 16:50:00
-------------------- CALL FOR PAPERS -------------------- The 11th ACM/IEEE Symposium on Archit... 

practical experience with GPL IP core in commercial product
by Unknown sent on 2014-11-13 01:03:00
I was wondering if anybody has had practical experience using IP licensed with the GNU Public Licens... 

How to get optimized/correct PLA or SOP output from abc with selectable phase?
by Johann Klammer sent on 2014-11-11 19:40:00
I can not seem to get a decently optimized .PLA file out of the abc  

USB PHY recommendations
by Mike Perkins sent on 2014-11-10 16:32:00
I have started using the TI TUSB1210 which is a USB PHY with a ULPI interface. However, I can... 

bitstream support for Artix 7 in torc?
by Unknown sent on 2014-11-05 11:31:00
Does TORC provide bit stream generation for Artix 7 devices??? Looking at the torc source files, i ... 

Latest Papers, Theses, Articles, etc

Adam Taylor's MicroZed Chronicles
by Adam Taylor |

This is a collection of a number of blogs I have written for the Xilinx Xcell Daily blog on how to u... Adam Taylor's MicroZed Chronicles
Free Range VHDL
by Bryan Mealy |

The no-frills guide to writing powerful code for you digital implementations.... Free Range VHDL
The Shock and Awe VHDL Tutorial
by Bryan Mealy |

The purpose of this tutorial is to provide students with a guide to help develop the skills necessar... The Shock and Awe VHDL Tutorial
VHDL Tutorial
by Peter J. Ashenden |

The purpose of this tutorial is to describe the modeling language VHDL. VHDL includes facilities for... VHDL Tutorial
VHDL handbook
by Hardi Electronics |

Introduction to Verilog
by Peter M. Nyasulu |

Verilog HDL is one of the two most common Hardware Description Languages (HDL) used by integrated ci... Introduction to Verilog
FPGA Implementation of Digital Filters
by Chi-Jui Chou |

Digital Filtering algorithms are most commonly implemented using general purpose digital signal proc... FPGA Implementation of Digital Filters
FPGAs!? Now What?
by Dave Vandenbout |

There are numerous requests in Internet forums that go something like this: "I am new to using FPGAs... FPGAs!? Now What?
Architecture of FPGAs and CPLDs: A Tutorial
by Stephen Brown |

This paper provides a tutorial survey of architectures of commercially available high-capacity fiel... Architecture of FPGAs and CPLDs: A Tutorial
Performance driven FPGA design with an ASIC perspective
by Andreas Ehliar |

FPGA devices are an important component in many modern devices. This means that it is important that... Performance driven FPGA design with an ASIC perspective