FPGA as heater

Started by John Larkin in comp.arch.fpga1 week ago 50 replies

We have a ZYNQ whose predicted timing isn't meeting decent margins. And we don't want a lot of output pin timing variation in real life. We...

We have a ZYNQ whose predicted timing isn't meeting decent margins. And we don't want a lot of output pin timing variation in real life. We can measure the chip temperature with the XADC thing. So, why not make an on-chip heater? Use a PLL to clock a bunch of flops, and vary the PLL output frequency to keep the chip temp roughly constant. -- John Larkin Highland Technology, ...


Master Xilinx FPGA like Jtag bridge.

Started by Anonymous in comp.arch.fpga1 week ago 10 replies

How to make master FPGA to connect to many FPGAs ? Two FPGAs connected by serial TDI - TDO, and two fpgas TMS TCK TDO and TDI connect to...

How to make master FPGA to connect to many FPGAs ? Two FPGAs connected by serial TDI - TDO, and two fpgas TMS TCK TDO and TDI connect to master fpga, master fpga has TMS TDI TDO TCK connected and working to pc normally, it need to make connection JTAG of two fpgas to other 4 ports or somehow can connect to master's jtag port ?


how to convert analog signal cccam video to digital using systemc

Started by Anonymous in comp.arch.fpga2 weeks ago 1 reply

Hi In the context of a university research, I try to convert the signal coming from an analog camera (1000tvl camera style) to obtain a digital...

Hi In the context of a university research, I try to convert the signal coming from an analog camera (1000tvl camera style) to obtain a digital signal and save it in a file in format h264; All using SYSTEMC. RQ: I start in systemc Someone can help me or guide me. thank you


versatile_FFT core has no output

Started by _Xilinx in comp.arch.fpga2 weeks ago 1 reply

I am trying to use https://github.com/freecores/versatile_fft , but after I run "make all", data_out.txt and res.txt are all empty. Anyone have...

I am trying to use https://github.com/freecores/versatile_fft , but after I run "make all", data_out.txt and res.txt are all empty. Anyone have same experience ?


How to download ISPLSI 1032 and how to program it?

Started by 임상진 in comp.arch.fpga2 weeks ago

ISPVM 18.1 and ISP (HW-USBN-2A) are connecting and downloading and it says that there is no information of ISPLSI 1032 Chip continuously. I...

ISPVM 18.1 and ISP (HW-USBN-2A) are connecting and downloading and it says that there is no information of ISPLSI 1032 Chip continuously. I tested 10 boards and it is hard because I have the same problem. I would like to help you. Lattices Know how to download ISPLSI 1032 and Jtag / ISP cable and how to get the program.


handshacking between modules, best practices ?

Started by kristoff in comp.arch.fpga3 weeks ago 6 replies

Hi, Last weekend, I was continueing on my small project to use a FPGA as DAC. I now use a hardware DAC (tlc5615). So I have two...

Hi, Last weekend, I was continueing on my small project to use a FPGA as DAC. I now use a hardware DAC (tlc5615). So I have two modules, a top-level module for the DDS and an additional module to drive the TLC. I have two signal for handshacking ("load" and "done"). At a certain point, I had the problem that one of the signals wasn't dropped fast enough, which resulted in a weir...


Simulation of PCIe at TLP level

Started by Svenn Are Bjerkem in comp.arch.fpga4 weeks ago 1 reply

Hi, has anybody simulated PCIe at TLP level? I would like to feed a 1x PCIe endpoint interface with data as if it was inserted into a host PCIe...

Hi, has anybody simulated PCIe at TLP level? I would like to feed a 1x PCIe endpoint interface with data as if it was inserted into a host PCIe slot. I need some pointers to documents or code describing what I have to do to make a simplem memory read and memory write. -- Svenn


Go to church on Sunday

Started by Rick C. Hodgin in comp.arch.fpga1 month ago 14 replies

The Creator of the universe calls you to be with Him where He is in the paradise of Heaven. He wants to forgive your sin and give you eternal...

The Creator of the universe calls you to be with Him where He is in the paradise of Heaven. He wants to forgive your sin and give you eternal life in a body like the angels, young, beautiful, strong, and without weakness or failing. Jesus is the way to forgiveness, and His free gift of eternal life. Go to church. Ask the Christians there to explain this to you in a way you can understa...


Xilinx Virtex4 Outputs for Camera Link

Started by Brad Smallridge in comp.arch.fpga1 month ago 18 replies

Can anyone tell me what I need to drive a Camera Link output directly from a V4? I have tried LVCMOS25 and I can see differential signals at the...

Can anyone tell me what I need to drive a Camera Link output directly from a V4? I have tried LVCMOS25 and I can see differential signals at the outputs but at the end of a 2 meter cable I see only DC differential levels as if the signals are dampened somehow. Brad Smallridge aivision


What is Christian evangelism all about?

Started by Rick C. Hodgin in comp.arch.fpga1 month ago 5 replies

It's about one thing: Forgiveness of sin from Jesus Christ, which leads to: (a) Salvation of your eternal soul, (b) A change of...

It's about one thing: Forgiveness of sin from Jesus Christ, which leads to: (a) Salvation of your eternal soul, (b) A change of your life here on Earth, (c) Being given the strength to say no to sin, and yes to God, (d) ----- Jesus makes you a new creation. It's not about church, it's not about being a better person. It's about Him giving you NEW LIFE, giving y...


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