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FPGA Blogs > Christopher Felton > A Bit Bucket had Holes

Christopher Felton
Christopher Felton received a B.S.E.C.E from the University of Minnesota, Duluth in 2000 and an M.S.E.E. degree from the University of Colorado, Colorado Springs in 2005. He works as a DSP and HDL design engineer. One of Christopher's current favorite activities is implementing DSP digital circuits with MyHDL. More information @ LinkedIn.

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A Bit Bucket had Holes

Posted by Christopher Felton on Jul 28 2010 under   

Couple months ago I wrote a quick little blog about a company called Tabula.  Tabula has a virtual 3D approach to achieving higher logic density in an FPGA.  See the previous blog for more information.

Along similar lines was another company called TierLogic which actually had multiple physical layers.  I was impressed with the Tabula approach and claims.  Along the same lines the TierLogic technology looked promising as well.  But, EE Times has reported that TierLogic has disbanded because it was unable to secure funding for Phase B.

Curious if others had an opinion (of course, everyone has an opinion!)

  • if TierLogic had a potential product? 
  • If TierLogic's FPGAs would have been successful (good technology doesn't always equal a good product). 
  • If the TierLogic approach was better than the Tabula approach?

I thought there was potential.  We are always looking for larger and larger logic densities.  I think most could use higher logic densities but we seem to be in the minority with the rest of our requirements.  Our requirements are a modest (or small) footprint, modest clock rates and high logic density.  TierLogic's product might have been a good fit for our needs.

It looks like we won't be getting those ultra dense FPGAs anytime soon unless they decide to sell their patents to "X" or "A". 

 



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posted by Christopher Felton
Christopher Felton received a B.S.E.C.E from the University of Minnesota, Duluth in 2000 and an M.S.E.E. degree from the University of Colorado, Colorado Springs in 2005. He works as a DSP and HDL design engineer. One of Christopher's current favorite activities is implementing DSP digital circuits with MyHDL. More information @ LinkedIn.

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