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Intel in Talks to buy Altera

Started by Unknown March 27, 2015
On 31/03/15 08:30, Anssi Saari wrote:
> Brian Drummond <brian@shapes.demon.co.uk> writes: > >> Well, Intel were Altera's 'second source' (back when that mattered) and >> (if I'm not mistaken) their original fab back in about 1983 - which is >> where the "Intel FPGAs" mentioned in another post came from. >> >> So there's quite a long association there. > > Wasn't there also some kind of Intel Atom + Altera FPGA on the same > chip? Ah yes, the > Stellarton. http://www.eetimes.com/document.asp?doc_id=1257969 > > I guess those weren't huge sellers... But last summer Intel announced > some upcoming Xeons with FPGA logic on board. No doubt targeting the > server markets where FPGA coprocessors have made appearances recently.
More likely Intel wants to head off the market which has ARM processor(s) plus custom glue logic. Target: highly-integrated low-power server farms.
On Saturday, March 28, 2015 at 3:54:12 AM UTC-4, rickman wrote:
> On 3/28/2015 1:38 AM, Rob Doyle wrote: > > On 3/27/2015 2:28 PM, Tim Wescott wrote: > >> On Fri, 27 Mar 2015 14:50:23 -0500, "" wrote: > >> > >>> http://www.wsj.com/articles/intel-in-talks-to-buy-altera-1427485172 > >>> --------------------------------------- > >>> Posted through http://www.FPGARelated.com > >> > >> Hmm. While I have tons of respect for Intel as a company that makes > >> stuff > >> that people will buy, I'm old enough to have seen more than one > >> generation > >> of Intel embedded processors go by the wayside when the PC market picked > >> up. > >> > >> So I don't trust Intel's attention span vis-a-vis whatever they happen to > >> think their core business is. If they kept Altera as an easily-spun-off > >> business unit, and kept it supported, then I could see them spinning it > >> off again when the PC market did pick up, or by some miracle they managed > >> to make cell phone processors that actually worked, or something. > >> > > > > Not just embedded processors... > > > > It wouldn't be the first time Intel was in the programmable logic business. > > > > http://www.dataman.com/media/datasheet/Intel/5C090.pdf > > http://www.dataman.com/media/datasheet/Intel/5C060.pdf > > https://docs.google.com/file/d/0B9rh9tVI0J5mSzhDNUVpeVcyNDA/edit > > > > Didn't Altera buy Intel's PLD business back in the '90s??? > > > > Sorry. I don't see how this could be a good thing for Altera. > > Yeah, I'm concerned too. I'm hoping that Altera is big enough that > Intel won't want to mess with them and destroy the company. > > I think those data sheets are from the days when dinosaurs roamed the > FPGA earth and was Intel's own attempt to enter the market. I have no > idea why they actually bailed. I can only assume the competition was > stiff then with a number of startups including Neocad providing the > place and route software for a number of these companies. Xilinx has > said they spend more on software development than they do developing the > hardware. Several of these companies dropped their in house software > development due to the huge cost. Maybe Intel dropped the product line > because of it. But much more recently they were working with a company > to produce some much more advanced product which I believe may still be > operating using Intel's fab technology, or has it also gone belly up? I > don't recall the name. > > Looks like Intel likes the Altera approach and want to keep it, literally. > > -- > > Rick
Intel acquired Wind River back in '09 but they've left them alone as a separate entity, so we can only hope they do the same with Altera. http://www.windriver.com/news/press/pr.html?ID=7081
rickman <gnuarm@gmail.com> writes:

> I thought that was two die in the same package, no? Reading your > article the term, "system-in-package" indicates multiple die. It > think the advantage is in reducing the system size and having a very > direct connection between the two chips. Putting them on one die > would likely make a faster connection possible, but would be much more > difficult to pair in various combinations.
I agree with the separate die part.
> That's the big reason why FPGA makers have resisted for so long > incorporating CPUs on the FPGA chip until recently.
Uh, resisted? Xilinx had the Virtex 2 and 4 Pros with integrated PowerPC cores around a decade ago and I'm pretty sure that was single die. I was involved in such a project in 2006, Virtex 4 Pro was new then and Virtex 2 Pro came out around 2002 I think (from the data sheet dates). Altera had a similar thing, Excalibur I think? I have to assume those weren't big sellers either since they pretty much disappeared. I have to assume they weren't resisting to offer these. My guess would be they couldn't offer them at competitive prices. Maybe the new generation is doing better in that regard.
On 3/31/2015 4:19 PM, Anssi Saari wrote:
> rickman <gnuarm@gmail.com> writes: > >> I thought that was two die in the same package, no? Reading your >> article the term, "system-in-package" indicates multiple die. It >> think the advantage is in reducing the system size and having a very >> direct connection between the two chips. Putting them on one die >> would likely make a faster connection possible, but would be much more >> difficult to pair in various combinations. > > I agree with the separate die part. > >> That's the big reason why FPGA makers have resisted for so long >> incorporating CPUs on the FPGA chip until recently. > > Uh, resisted? Xilinx had the Virtex 2 and 4 Pros with integrated PowerPC > cores around a decade ago and I'm pretty sure that was single die. I was > involved in such a project in 2006, Virtex 4 Pro was new then and Virtex > 2 Pro came out around 2002 I think (from the data sheet dates).
Yeah, they had those and Altera had an ARM and Atmel had a... I think maybe an AVR on the die with the FPGA. But they all let them die rather than continue the part in the next generation. When asked Xilinx people in particular (who used to be very vocal in this group... in fact, too vocal which is why they aren't here anymore) said the problem was the many combinations of CPU, RAM and FPGA that would be required, not to mention the packaging. Seems they don't play the same game the MCU makers do who regularly have dozens if not hundreds of combinations of any given processor. Also, this was the era when all FPGAs were power hungry and expensive. So yeah, they resisted the rest of the market who would have loved *affordable* FPGAs with CPUs. The FPGA makers could have done it, but they chose not to address that market because they were after the *big* bucks at the high end.
> Altera had a similar thing, Excalibur I think? I have to assume those > weren't big sellers either since they pretty much disappeared. > > I have to assume they weren't resisting to offer these. My guess would > be they couldn't offer them at competitive prices. Maybe the new > generation is doing better in that regard.
I think the difference is that their market is determined by pretty much one industry, comms. When they say they would like to see a part, A and X reply, "Will Tuesday be soon enough?" I expect *that* market reached a point where the integrated ARM was powerful enough and needed tightly coupled enough that it became a worthwhile part. I know the FPGA companies have all been chasing the high volume markets like automotive and even phones and tablets. But all of these guys have volumes that just don't make sense for FPGAs 99% of the time. Comms is where the FPGA profit is and will be for some time to come. -- Rick
On Wed, 01 Apr 2015 01:16:30 -0400, rickman wrote:

> On 3/31/2015 4:19 PM, Anssi Saari wrote: >> rickman <gnuarm@gmail.com> writes: >> >>> I thought that was two die in the same package, no? Reading your >>> article the term, "system-in-package" indicates multiple die. It >>> think the advantage is in reducing the system size and having a very >>> direct connection between the two chips. Putting them on one die >>> would likely make a faster connection possible, but would be much more >>> difficult to pair in various combinations. >> >> I agree with the separate die part. >> >>> That's the big reason why FPGA makers have resisted for so long >>> incorporating CPUs on the FPGA chip until recently. >> >> Uh, resisted? Xilinx had the Virtex 2 and 4 Pros with integrated >> PowerPC cores around a decade ago and I'm pretty sure that was single >> die. I was involved in such a project in 2006, Virtex 4 Pro was new >> then and Virtex 2 Pro came out around 2002 I think (from the data sheet >> dates). > > Yeah, they had those and Altera had an ARM and Atmel had a... I think > maybe an AVR on the die with the FPGA. But they all let them die rather > than continue the part in the next generation.
<balance snipped> I was on a project that gave those parts a serious look. We ended up using a plain old FPGA talking to a processor. Partially this was because we had a ton of boards that were all using that same processor but without the FPGA, but partially this was because we didn't see a great big advantage in terms of project hours to the embedded processor. I have thought for a long time that instead of hugely complicated, specialized peripherals, a chip that has a processor with an FPGA mapped to the peripheral space could have some use -- it seems like you never have the peripherals you'd really like, unless you have a whole bunch of peripherals just sitting there sleeping. There's probably a ton of practical reasons why it's a dumb idea. -- Tim Wescott Wescott Design Services http://www.wescottdesign.com
> I have thought for a long time that instead of hugely complicated, > specialized peripherals, a chip that has a processor with an FPGA mapped > to the peripheral space could have some use -- it seems like you never > have the peripherals you'd really like, unless you have a whole bunch of > peripherals just sitting there sleeping. There's probably a ton of > practical reasons why it's a dumb idea.
There are two popular products on both ends of the spectrum that have been around for years: microcontrollers with programmable logic peripherals (for example, Cypress PSOC) and a microcontroller core implemented on an FPGA (for example, Altera NIOS). I've used both example products with great success. As you said, it's real convenient to roll your own peripherals with impunity. It saved me hours of coding effort when you can smartly implement the peripheral of your dreams with a little HW design. JJS
On 4/1/2015 1:27 PM, John Speth wrote:
>> I have thought for a long time that instead of hugely complicated, >> specialized peripherals, a chip that has a processor with an FPGA mapped >> to the peripheral space could have some use -- it seems like you never >> have the peripherals you'd really like, unless you have a whole bunch of >> peripherals just sitting there sleeping. There's probably a ton of >> practical reasons why it's a dumb idea. > > There are two popular products on both ends of the spectrum that have > been around for years: microcontrollers with programmable logic > peripherals (for example, Cypress PSOC) and a microcontroller core > implemented on an FPGA (for example, Altera NIOS).
Calling the PSOC circuitry "programmable logic" is a bit of a stretch. Yeah, I guess technically it is logic and it is "programmable", but it is not at all general purpose. In some devices it has been dumbed down to the point of being configurable serial devices that can be a UART, SPI or similar devices, sort of a super USART... not really much like FPGAs or even PLDs. Even the parts that have some programmable elements are not terribly flexible.
> I've used both example products with great success. As you said, it's > real convenient to roll your own peripherals with impunity. It saved me > hours of coding effort when you can smartly implement the peripheral of > your dreams with a little HW design.
The part that gets me about the newer versions of this theme is that they are large, pricey FPGAs and incorporate fairly high end CPUs which are typically programmed under Linux... a very far cry from the efficient solution I would like to see. There are few engineers who can even design the entire system on that chip spanning logic design and system programming. -- Rick
On Wed, 01 Apr 2015 19:10:55 -0400, rickman wrote:

> On 4/1/2015 1:27 PM, John Speth wrote:
>> I've used both example products with great success. As you said, it's >> real convenient to roll your own peripherals with impunity. It saved >> me hours of coding effort when you can smartly implement the peripheral >> of your dreams with a little HW design. > > The part that gets me about the newer versions of this theme is that > they are large, pricey FPGAs and incorporate fairly high end CPUs which > are typically programmed under Linux... a very far cry from the > efficient solution I would like to see. There are few engineers who can > even design the entire system on that chip spanning logic design and > system programming.
Agreed. We're looking hard at both Zynq and the Cyclone V SOC, both of which have big monster Cortex A9s meant to run Linux with a mess of DRAM and etc. Which, I mean we can make work. But if I could get a 10-20KLUT FPGA with a dual or quad Cortex M4 instead? Nice and light with every intention of running bare metal with 10-20K of code? I'd take it in a heartbeat. -- Rob Gaddi, Highland Technology -- www.highlandtechnology.com Email address domain is currently out of order. See above to fix.
On 02/04/2015 00:10, rickman wrote:
> The part that gets me about the newer versions of this theme is that > they are large, pricey FPGAs and incorporate fairly high end CPUs which > are typically programmed under Linux... a very far cry from the > efficient solution I would like to see. There are few engineers who can > even design the entire system on that chip spanning logic design and > system programming. >
Is there any info on the price range for the latest Xilinx UltraScale+ parts?
On 4/1/2015 7:27 PM, Rob Gaddi wrote:
> On Wed, 01 Apr 2015 19:10:55 -0400, rickman wrote: > >> On 4/1/2015 1:27 PM, John Speth wrote: > >>> I've used both example products with great success. As you said, it's >>> real convenient to roll your own peripherals with impunity. It saved >>> me hours of coding effort when you can smartly implement the peripheral >>> of your dreams with a little HW design. >> >> The part that gets me about the newer versions of this theme is that >> they are large, pricey FPGAs and incorporate fairly high end CPUs which >> are typically programmed under Linux... a very far cry from the >> efficient solution I would like to see. There are few engineers who can >> even design the entire system on that chip spanning logic design and >> system programming. > > Agreed. We're looking hard at both Zynq and the Cyclone V SOC, both of > which have big monster Cortex A9s meant to run Linux with a mess of DRAM > and etc. Which, I mean we can make work. But if I could get a 10-20KLUT > FPGA with a dual or quad Cortex M4 instead? Nice and light with every > intention of running bare metal with 10-20K of code? I'd take it in a > heartbeat.
Learn Forth and make that 4 to 8 KB of code. Which brings us to the possible reason they don't make the lower end CPUs in an FPGA... it competes against soft cores which can do the job you describe very well. There are fast, efficient CPU cores which run at 100 MIPS and use under 1000 LUTs, not so much in your 10-20 kLUT device, eh? Very probably cheaper in the long run than a chip with hard cores. If you want to run bare-metal quick and easy, check out the J1 Forth CPU by James Bowman. I've rolled my own similar CPUs and I really like his design. http://www.excamera.com/sphinx/fpga-j1.html Just as a point of comparison, the GA144 is a bit like an FPGA but uses tiny 18 bit processors as logic elements, 144 of them. It pretty well sucks in many regards... well, "sucks" is a poor choice of words I guess. But they had a cool idea of the tiny processors and connecting them in a net, but then totally forgot to consider any applications when designing a chip around it. http://www.greenarraychips.com/home/products/ -- Rick