FPGA for a beginner

'Making a simple, structured and efficient VHDL testbench - Step-by-step' 
is a powerpoint presentation and free webinar that shows novices how to get started making good testbenches, *and* experienced designers how to properly structure your testbenches.
The example DUT is a very simple interrupt controller, and the testbench itself uses the free and open source Bitvis Utility Library (compatible with VHDL 93, 2002 and 2008). 
http://bitvis.no/resources/bitvis-utility-library-download
This library has a very low user threshold, so you're up and running directly after watching the presentation. 
For simplicity reasons Bitvis Utility Library hides the more advanced options for novices, making it easy to get started, and at the same time allowing more advanced use when needed.
Bitvis Utility Library is being replaced by UVVM Utility Library (also free and open source) to allow even more advanced options. UVVM Utility Library requires VHDL 2008. 
http://bitvis.no/resources/uvvm-utility-library-download/