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Reconfigurable Computing: Accelerating Computation with Field-Programmable Gate Arrays

Gokhale, Maya B., Graham, Paul S. 2005

A one-of-a-kind survey of the field of Reconfigurable Computing

Gives a comprehensive introduction to a discipline that offers a 10X-100X acceleration of algorithms over microprocessors

Discusses the impact of reconfigurable hardware on a wide range of applications: signal and image processing, network security, bioinformatics, and supercomputing

Includes the history of the field as well as recent advances

Includes an extensive bibliography of primary sources


Why Read This Book

You should read this book if you want a broad, research-informed overview of how FPGAs are used to accelerate real workloads — from architecture and mapping strategies to toolchains and benchmarked applications. It collects historical perspective, design techniques, and concrete case studies so you can judge when and how to apply reconfigurable hardware to speed up algorithms.

Who Will Benefit

Advanced engineers, graduate students, and architects who need a comprehensive survey of reconfigurable computing techniques and real-world FPGA acceleration case studies.

Level: Advanced — Prerequisites: Solid understanding of digital logic and computer architecture; familiarity with basic FPGA concepts and at least one HDL (Verilog/VHDL) or algorithmic programming (C/C++) is recommended.

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Key Takeaways

  • Understand the main FPGA architectures and how architectural features (logic blocks, routing, memory, and DSP blocks) affect performance.
  • Evaluate which algorithms and workloads benefit most from FPGA acceleration and estimate expected speedups.
  • Map algorithmic kernels to reconfigurable hardware, including discussion of dataflow, pipelining, and resource trade-offs.
  • Apply design methodologies and toolchain concepts, including synthesis, place-and-route, and higher-level compilation approaches (HLS/compilers).
  • Analyze real-world case studies (signal/image processing, networking, bioinformatics) to extract reusable accelerator patterns.
  • Identify research directions and practical limitations such as I/O bottlenecks, reconfiguration overhead, and portability concerns.

Topics Covered

  1. Introduction and history of reconfigurable computing
  2. FPGA architectures and building blocks
  3. Programming models and hardware/software co-design
  4. Compilation, mapping, and synthesis for FPGAs
  5. High-level synthesis and compiler approaches
  6. Design methodologies and toolchains
  7. Performance evaluation and benchmarking
  8. Signal and image processing applications
  9. Networking and security applications
  10. Bioinformatics and scientific computing on FPGAs
  11. Case studies of accelerator deployments
  12. System integration and reconfigurable platforms
  13. Future trends and open research problems
  14. Extensive bibliography and references

Languages, Platforms & Tools

VerilogVHDLC/C++ (for HLS and algorithm descriptions)General FPGAsXilinxAltera/IntelFPGA vendor toolchains (synthesis/implementation)High-Level Synthesis (HLS) concepts and toolsMapping/compilation toolchains discussed conceptually

How It Compares

Covers similar survey territory to Hartenstein's edited reconfigurable computing volumes but is more application-driven; by contrast, Wayne Wolf's "FPGA-Based System Design" is more hands-on with practical design examples and system-level topics.

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