New Comments System (please help me test it)

Stephane Boucher October 4, 201618 comments

I thought it would take me a day or two to implement, it took almost two weeks...

But here it is, the new comments systems for blogs, heavily inspired by the forum system I developed earlier this year.  

Which means that:

  • You can easily add images, either by drag and drop or through the 'Insert Image' button
  • You can add MathML, TeX and ASCIImath equations and they will be rendered with Mathjax
  • You can add code snippets and they will be highlighted with highlights.js
  • You can edit...

Use DPLL to Lock Digital Oscillator to 1PPS Signal

Michael Morris July 24, 20162 comments
Introduction

There are occasions where it is desirable to lock a digital oscillator to an external time reference such as the 1PPS (One Pulse Per Second) signal output from a GPS receiver. One approach would be to synchronize a fixed frequency oscillator on the leading edge of the 1PPS signal. In many cases, this will result in adequate performance. However, in situations where simple synchronization does not provide adequate performance, digital phase-lock techniques can be applied to a...


Summer of gateware is coming (again)

Christopher Felton April 29, 20162 comments

How time flies!  I swear my last post was a summary of the 2015 summer of gateware.  This year (2016) MyHDL is participating in the Google summer of code again, for the second year, continuing as a sub-org of the Python Software Foundation organization.

This year, so far, has been amazing and inspiring.  We have had many talented students inquire about the project and contribute to myhdl and


Data Types for Control & DSP

Tim Wescott April 27, 20166 comments

There's a lot of information out there on what data types to use for digital signal processing, but there's also a lot of confusion, so the topic bears repeating.

I recently posted an entry on PID control. In that article I glossed over the data types used by showing "double" in all of my example code.  Numerically, this should work for most control problems, but it can be an extravagant use of processor resources.  There ought to be a better way to determine what precision you need...


3 Good News

Stephane Boucher March 9, 20161 comment
Good News #1

Last week, I announced a new and ambitious reward program that will be funded by the new Vendors Directory.

This week, I am happy to announce that we have our firsts two sponsors!  Quantum Leaps & Abelon Systems have agreed to pay the sponsorship fee to be listed in the new Vendors Directory.  Because of their support, there is now some money in the reward pool ($1,000) and enough to pay for the firsts 500 'beers' awarded.  Please...


Go Big or Go Home - Generating $500,000 for Contributors

Stephane Boucher February 18, 20168 comments
In a Nutshell
  • A new Vendors Directory has been created
  • Vendors will be invited to pay a sponsorship fee to be listed in the directory
  • 100% of the basic sponsorship fee will be distributed to the *Related Sites community through a novel reward system
  • The goal is for the directory to eventually generate - drum roll please -  $500,000 on a yearly basis for contributing members on the *Related Sites
  • Members will choose how the reward money gets distributed between...

The New Forum is LIVE!

Stephane Boucher February 18, 20161 comment

After months of hard word, I am very excited to introduce to you the new forum interface.  

Here are the key features:

1- Easily add images to a post by drag & dropping the images in the editor

2- Easily attach files to a post by drag & dropping the files in the editor

3- Add latex equations to a post and they will be rendered with Mathjax (tutorial)

4- Add a code snippet and surround the code with


Running Average

Mike February 15, 20166 comments

The running average filter is a useful way to reduce noise in a system.  One project I recently worked on required a 4 times frequency output from an encoder input.  The problem was the encoder is mounted to the wheel of an old truck and bearing noise was making the original algorithm generate way too many pulses.  The original algorithm worked, but the noise on the input made it useless.

I first implemented the moving average based on


Ancient History

Mike January 18, 201612 comments

The other day I was downloading an IDE for a new (to me) OS.  When I went to compile some sample code, it failed.  I went onto a forum, where I was told "if you read the release notes you'd know that the peripheral libraries are in a legacy download".  Well damn!  Looking back at my previous versions I realized I must have done that and forgotten about it.  Everything changes, and keeping up with it takes time and effort.

When I first started with microprocessors we...


Dealing With Fixed Point Fractions

Mike January 5, 20163 comments

Fixed point fractional representation always gives me a headache because I screw it up the first time I try to implement an algorithm. The difference between integer operations and fractional operations is in the overflow.  If the representation fits in the fixed point result, you can not tell the difference between fixed point integer and fixed point fractions.  When integers overflow, they lose data off the most significant bits.  When fractions overflow, they lose data off...


How FPGAs work, and why you'll buy one

Yossi Kreinin June 20, 201311 comments

Today, pretty much everyone has a CPU, a DSP and a GPU, buried somewhere in their PC, phone, car, etc. Most don't know or care that they bought any of these, but they did.

Will everyone, at some future point, also buy an FPGA? The market size of FPGAs today is about 1% of the annual global semiconductor sales (~$3B vs ~$300B). Will FPGA eventually...


StrangeCPU #1. A new CPU

Victor Yurkovsky February 25, 20136 comments

Summary: In this multi-part series I will share with you a design, implementation notes and code for a slightly different kind of a CPU featuring a novel token machine that resolves an 8-bit token to pretty much any address in a 32-bit or even 64-bit address space, using not much more than an adder.

Table of Contents:
  • Part 1: A new CPU - technology review, re-examination of the premises;  StrangeCPU concepts; x86 notes.

VHDL tutorial - part 2 - Testbench

Gene Breniman October 30, 20073 comments

In an earlier article I walked through the VHDL coding of a simple design. In this article I will continue the process and create a test bench module to test the earlier design. The Xilinx ISE environment makes it pretty easy to start the testing process. To start the process, select "New Source" from the menu items under "Project". This launches the "New Source Wizard". From within the Wizard select "VHDL Test Bench" and enter the name of the new module (click 'Next' to...


VHDL tutorial - A practical example - part 3 - VHDL testbench

Gene Breniman June 26, 20116 comments

In part 1 (//www.embeddedrelated.com/showarticle/85.php) of this series we focused on the hardware design, including some of the VHDL definitions of the I/O characteristics of the CPLD part.  In part 2 (//www.embeddedrelated.com/showarticle/87.php), we described the VHDL logic of the CPLD for this design.  In part 3, we will show the entire VHDL design and the associated tests used to prove that we have, in fact, designed what we started out to...


MyHDL FPGA Tutorial I (LED Strobe)

Christopher Felton February 1, 20126 comments

Last updated 05-Nov-2015

Introduction

From many perspectives the latest FPGA offerings from 'X' and 'A' are large devices - mucho programmable logic resources.  Even the devices that one can get for sub \$10 are relatively large.  Because of the size of these FPGAs they are implemented using an HDL.  To manually configure each circuit would be a long and tedious task.  It is not feasible to program an FPGA by manually defining the logic for each LUT and manually...


VHDL tutorial

Gene Breniman October 4, 20077 comments

When I was first introduced to "Programmable Logic" several years ago, it was an answer to many of the challenges that I was struggling with. Though the parts were primitive by today's standards (simple PALs verses FPGA), they were an extremely cost effective tool addressing the need for specialized logic blocks.

I have continued to incorporate these powerful blocks into many of my latest designs. My current favorite part line is the Xilinx CoolRunner series (XC2Cxxx). In this...


VHDL tutorial - A practical example - part 2 - VHDL coding

Gene Breniman May 27, 2011

In part 1 of this series we focused on the hardware design, including some of the VHDL definitions of the I/O characteristics of the CPLD part.  In part 2, we will describe the VHDL logic of the CPLD for this design.

With any design, the first step to gather the requirements for the job at hand.  From part 1 of this article, I have copied two sections that address some of the requirements for the CPLD design.

The data acquisition engine has the...


VHDL tutorial - Creating a hierarchical design

Gene Breniman May 22, 20086 comments

In earlier blog entries I introduced some of the basic VHDL concepts. First, developing a function ('VHDL tutorial') and later verifying and refining it ('VHDL tutorial - part 2 - Testbench' and 'VHDL tutorial - combining clocked and sequential logic'). In this entry I will describe how to build a VHDL design made up of a collection of smaller pieces (similar to using subroutines in software development).

When developing a design in VHDL, the first impulse is to...


BGA and QFP at Home 1 - A Practical Guide.

Victor Yurkovsky October 13, 20132 comments

It is almost universally accepted by the hobbyists that you can't work with high-density packages at home.  That is entirely incorrect.  I've been assembling and reflowing BGA circuit boards at home for a few years now.  BGAs and 0.5mm-pitch QFPs are well within the realm of a determined amateur. 

This series of articles presents practical information on designing and assembling boards with high-density packages at home.  While the focus is on FPGA packages, most of...


An Editor for HDLs

Dave Vandenbout July 17, 201211 comments

Unless you're still living in the '90s and using schematics, your FPGA designs are entered into text files as VHDL or Verilog source. Which, of course, implies you're using some form of text editor. Now, right after brace placement in C, the choice of an editor is the topic most likely to incite a nerd civil war (it's a bike-shed issue). I won't attempt to influence your choice because it really makes no difference to me. But if you are using the same editor I do, then maybe I can help you...


New Comments System (please help me test it)

Stephane Boucher October 4, 201618 comments

I thought it would take me a day or two to implement, it took almost two weeks...

But here it is, the new comments systems for blogs, heavily inspired by the forum system I developed earlier this year.  

Which means that:

  • You can easily add images, either by drag and drop or through the 'Insert Image' button
  • You can add MathML, TeX and ASCIImath equations and they will be rendered with Mathjax
  • You can add code snippets and they will be highlighted with highlights.js
  • You can edit...

3 Good News

Stephane Boucher March 9, 20161 comment
Good News #1

Last week, I announced a new and ambitious reward program that will be funded by the new Vendors Directory.

This week, I am happy to announce that we have our firsts two sponsors!  Quantum Leaps & Abelon Systems have agreed to pay the sponsorship fee to be listed in the new Vendors Directory.  Because of their support, there is now some money in the reward pool ($1,000) and enough to pay for the firsts 500 'beers' awarded.  Please...


Go Big or Go Home - Generating $500,000 for Contributors

Stephane Boucher February 18, 20168 comments
In a Nutshell
  • A new Vendors Directory has been created
  • Vendors will be invited to pay a sponsorship fee to be listed in the directory
  • 100% of the basic sponsorship fee will be distributed to the *Related Sites community through a novel reward system
  • The goal is for the directory to eventually generate - drum roll please -  $500,000 on a yearly basis for contributing members on the *Related Sites
  • Members will choose how the reward money gets distributed between...

The New Forum is LIVE!

Stephane Boucher February 18, 20161 comment

After months of hard word, I am very excited to introduce to you the new forum interface.  

Here are the key features:

1- Easily add images to a post by drag & dropping the images in the editor

2- Easily attach files to a post by drag & dropping the files in the editor

3- Add latex equations to a post and they will be rendered with Mathjax (tutorial)

4- Add a code snippet and surround the code with


Helping New Bloggers to Break the Ice: A New Ipad Pro for the Author with the Best Article!

Stephane Boucher November 9, 2015

Breaking the ice can be tough.  Over the years, many individuals have asked to be given access to the blogging interface only to never post an article.  Maybe they underestimated the time it takes to write a decent article, or maybe they got cold feet. I don't blame or judge them at all - how many times in my life have I had the intention to do something but didn't follow through?  Once, maybe twice 😉 (don't worry if you don't...


Welcoming MANY New Bloggers!

Stephane Boucher October 27, 20153 comments

The response to the latest call for bloggers has been amazing and I am very grateful.

In this post I present to you the individuals who, so far (I am still receiving applications at an impressive rate and will update this page as more bloggers are added),  have been given access to the blogging interface.  I am very pleased with the positive response and I think the near future will see the publication of many great articles, given the quality of the...


Recruiting New Bloggers!

Stephane Boucher October 16, 20157 comments

Previous calls for bloggers have been very successful in recruiting some great communicators - Rick LyonsJason Sachs, Victor Yurkovsky, Mike Silva, Markus NentwigGene BrenimanStephen Friederichs,


Two jobs

Stephane Boucher December 5, 201223 comments

For those of you following closely embeddedrelated and the other related sites, you might have noticed that I have been less active for the last couple of months, and I will use this blog post to explain why. The main reason is that I got myself involved into a project that ended up using a better part of my cpu than I originally thought it would.

I currently have two jobs: one as an electrical/dsp engineer recycled as a web publisher and the other as a parent of three kids. My job...


FPGA Bloggers Needed - New Reward System

Stephane Boucher April 11, 20112 comments

Are you an FPGA expert? If you are an have an interest in sharing your knowledge with the FPGA community, you might be interested in the new reward system for bloggers (see the blogs section here).

The rewards will be based on page impressions, meaning that the more traffic a blog post will get, the faster it will generate rewards for the author.

Basically, a given blog post will generate $25 to the author for every 250 unique pageviews, up to a maximum total reward of $500 per blog post...


New Design - Finally!

Stephane Boucher April 29, 20093 comments

For those of you who are familiar with my work, you already know that FPGARelated.com is not the only engineering web site that I publish. I also publish DSPRelated.com and EmbeddedRelated.com. Those two web sites have been on a new design for quite some time now and porting the new design to FPGARelated.com has been on my todo list for too long!  I am glad today to announce that I have finally found the time to apply the more modern design to FPGARelated.com.

Thank you...