Forums Update, Tips and Tricks - Please Read!

Started by stephaneb 4 years ago11 replieslatest reply 5 months ago1536 views
It's been a few months since the launch of the new forums.  Here are a few thoughts. The thumbsup and beer buttons    If there is one thing that could have a...

Doubt about constraining external input

Started by simonzz 22 hours ago4 replieslatest reply 15 hours ago16 views
Hi all,I am usig an AD9914 DDS its DROVER output connected to a I/O of the FPGA...

Implementing a folded FIR on FPGA

Started by DHMarinov 1 month ago2 replieslatest reply 3 weeks ago34 views
Hello there,This is a follow up video about FIR filter design on FPGA. It goes into the implementation of a folded FIR as well as some aspects the design.You can...

Efficient implementation of FIR filters on a FPGA

Started by DHMarinov 2 months ago2 replieslatest reply 2 months ago38 views
Hello there,I made a short video in which I present a way to implement FIR filters on FPGA (Xilinx) by using only DSP slices. You can check it out here: PS:I'd...

Xilinx FIR Compiler Fractional Rate Converter

Started by ismailt42 2 months ago1 replylatest reply 2 months ago26 views
Hello, I have designed a FIR Fractional Rate Converter Filter by using FIR Compiler. The purpose of the design convert 20MHz(20M samples) to 20.48MHz(20.48M samples)...

Polyphase Filter Bank channelizer issue

Started by epetragl 3 months ago5 replieslatest reply 3 months ago177 views
Hello, I am currently studying the implementation of a Polyphase Filter Bank channelizer designed by Xilinx in its XAPP1161. The architecture is composed by a single...

UART communication For Nexys A7-100t

Started by MCU231 3 months ago1 replylatest reply 3 months ago45 views
Hello,I'm new to UART for FPGA and recently I tried a demo project that I found at: problem is using RxD_data_ready...

Zedboard and the ov7670 settings

Started by shlomishab 3 months ago36 views
I've been working on a video streaming project using a zedboard and the ov7670 camera. My project is based on this one (capture and vga .vhd files):

Attempting to implement UART - Unexpected Behaviour

Started by fayalalebrun 4 months ago9 replieslatest reply 4 months ago44 views
I have been trying to implement a UART in order to communicate between my Lattice MachXO3D board and my computer. At the moment I am attempting to implement the...

Modelsim Error: (vsim-3555) Identifier is not a unit name for the physical type

Started by Echoonezero 5 months ago5 replieslatest reply 5 months ago21 views
Hello,I am a newbie in verifying complex FPGA designs.  In my testbench, I am reading the test vectors from  a text file and assigning them to the input ports...

Registering will allow you to participate to the forums on ALL the related sites and give you access to all pdf downloads.

Sign up

I agree with the terms of use and privacy policy.

Try our occasional but popular newsletter. VERY easy to unsubscribe.
or Sign in