Forums Update, Tips and Tricks - Please Read!

Started by stephaneb 4 months ago4 replieslatest reply 2 months ago254 views
It's been a few months since the launch of the new forums.  Here are a few thoughts. The thumbsup and beer buttons    If there is one thing that could have a...

Packaging custom IP (master) in XPS

Started by vijji148 2 weeks ago1 replylatest reply 2 weeks ago18 views
Hi, I need to package a customized master IP with a set of hdl files, using XPS tool. As I am using Spartan 6 FPGA, I cannot use Vivado. Can anyone guide in doing...

Simple logic

Started by Qube 2 months ago3 replieslatest reply 2 months ago40 views
Hi, Im currently making project of protection for voltage inverter. I know my problem is probably too simple to even post it but im just stuck.. Anyway im using...

VGA signal generation

Started by n_gorshenin 2 months ago1 replylatest reply 2 months ago37 views
Hello! My task is creation of real-time system which can draw simple graphics figure on monitor (VGA) when the system register input pulse. The main difficulty is...

APB Bridge

Started by RADOVID5 2 months ago2 replieslatest reply 2 months ago35 views
I am Jyotirmaya . Could anyone help me regarding how many FSMs are required for the APB Bridge slave ?

SSB Demodulation

Started by b2508 4 months ago13 replieslatest reply 3 months ago142 views
Hi all,I am trying to do the USB SSB Demodulation in FPGA.From what I understood, SSB demodulation is obtained by having m(t) - baseband message signal of frequency...

manipulation of two dimensional matrices in VHDL

Started by sanghamitra6 4 months ago13 replieslatest reply 4 months ago62 views
Two dimensional matrices can be handled in VHDL if we directly enter the elements of the matrix in the VHDL module. But if the matrix is very large typing all the...

Welcome to the New Forum Interface!

Started by stephaneb 1 year ago15 replieslatest reply 4 months ago473 views
After months of hard word, I am very excited to introduce to you the new forum interface.  It will be the foundation of the related sites for the next several...

Mealy or Moore? none and not even state machine

Started by kaz 5 months ago11 replieslatest reply 4 months ago93 views
I used to work in the old days of digital design and was familiar with Moore and Mealy style of state machine methodology. It was an attractive University topic...

Glitch on Articx7

Started by joshuablanco 4 months ago3 replieslatest reply 4 months ago34 views
Hi, i need to watch a "glitch" in a simple combinational circuit, i'm simulating in ISE_14, but i don't achieve watch it, i know that i need to understand three...

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