VLSI Digital Signal Processing Systems : Design and Implementation
Digital audio, speech recognition, cable modems, radar, high-definition television-these are but a few of the modern computer and communications applications relying on digital signal processing (DSP) and the attendant application-specific integrated circuits (ASICs). As information-age industries constantly reinvent ASIC chips for lower power consumption and higher efficiency, there is a growing need for designers who are current and fluent in VLSI design methodologies for DSP. Enter VLSI Digital Signal Processing Systems-a unique, comprehensive guide to performance optimization techniques in VLSI signal processing. Based on Keshab Parhi's highly respected and popular graduate-level courses, this volume is destined to become the standard text and reference in the field. This text integrates VLSI architecture theory and algorithms, addresses various architectures at the implementation level, and presents several approaches to analysis, estimation, and reduction of power consumption. Throughout this book, Dr. Parhi explains how to design high-speed, low-area, and low-power VLSI systems for a broad range of DSP applications. He covers pipelining extensively as well as numerous other techniques, from parallel processing to scaling and roundoff noise computation. Readers are shown how to apply all techniques to improve implementations of several DSP algorithms, using both ASICs and off-the-shelf programmable digital signal processors. The book features hundreds of graphs illustrating the various DSP algorithms, examples based on digital filters and transforms clarifying key concepts, and interesting end-of-chapter exercises that help match techniques with applications. In addition, the abundance of readily available techniques makes this an extremely useful resource for designers of DSP systems in wired, wireless, or multimedia communications. The material can be easily adopted in new courses on either VLSI digital signal processing architectures or high-performance VLSI system design. An invaluable reference and practical guide to VLSI digital signal processing. A tremendous source of optimization techniques indispensable in modern VLSI signal processing, VLSI Digital Signal Processing Systems promises to become the standard in the field. It offers a rich training ground for students of VLSI design for digital signal processing and provides immediate access to state-of-the-art, proven techniques for designers of DSP applications-in wired, wireless, or multimedia communications. Topics include: Transformations for high speed using pipelining, retiming, and parallel processing techniques Power reduction transformations for supply voltage reduction as well as for strength or capacitance reduction Area reduction using folding techniques Strategies for arithmetic implementation Synchronous, wave, and asynchronous pipelining Design of programmable DSPs. An Instructor's Manual presenting detailed solutions to all the problems in the book is available from the Wiley editorial department.
Why Read This Book
You should read this book if you need a rigorous, architecture-first treatment of how DSP algorithms are transformed into high-throughput, low-latency VLSI implementations; it shows the systematic use of pipelining, retiming, folding/unfolding and systolic design to optimize throughput, area, and power. You will gain the design patterns and mathematical transformations that let you reason about algorithm-to-hardware tradeoffs before writing HDL or targeting FPGAs/ASICs.
Who Will Benefit
Graduate students, FPGA/ASIC design engineers, and DSP architects who must map DSP algorithms to efficient VLSI or FPGA implementations and optimize latency, throughput, and area.
Level: Advanced — Prerequisites: Solid background in digital signal processing (filtering, FFTs), digital logic and computer architecture fundamentals, and familiarity with basic VLSI concepts (timing, area, power).
Key Takeaways
- Apply algebraic and scheduling transformations (pipelining, retiming, unfolding, folding) to meet throughput and latency constraints
- Design and analyze systolic and array-based architectures for common DSP kernels (FIR, IIR, FFT)
- Optimize arithmetic datapaths for VLSI implementation, including multiplier, adder, and bit-serial/parallel tradeoffs
- Architect memory and interconnect to support high-rate streaming DSP and minimize bottlenecks
- Evaluate area/throughput/power tradeoffs and select architectural alternatives for ASIC or FPGA targets
Topics Covered
- Introduction and DSP-VLSI Design Metrics
- Arithmetic Representations and Basic Building Blocks
- Pipelining and Parallelism in DSP Systems
- Retiming and Scheduling Techniques
- Unfolding and Folding Transformations
- Systolic Architectures and Regular Arrays
- FIR Filter Architectures and Implementation
- IIR Filters and Recursive Structures
- FFT Architectures and Implementation Strategies
- Memory Architectures, Interconnect, and I/O
- Low-power and Area-Optimal Design Techniques
- Case Studies and Design Examples
Languages, Platforms & Tools
How It Compares
Compared with Woods et al.'s FPGA-focused 'FPGA-based Implementation of Signal Processing Systems', Parhi is more theoretical and VLSI-architecture oriented (transformations and proofs) while Woods provides practical FPGA mapping, tool flow, and HDL examples.
